ps2kb - avalon testing

.gitignore

@@ -6,3 +6,8 @@ simulation/
 *.qws
 *.qarlog
 *.bak
+.qsys_edit/
+otogame/
+*.sopcinfo
+*.tcl~
+.metadata/

LICENSE

+Copyright (c) 2017 by Fang Lu and Xutao J. Jiang. All rights reserved.

RemoteSystemsTempFiles/.project

+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>RemoteSystemsTempFiles</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+	</buildSpec>
+	<natures>
+		<nature>org.eclipse.rse.ui.remoteSystemsTempNature</nature>
+	</natures>
+</projectDescription>

input/ps2kb.sv

 /**
- *	ps2
+ *	ps2kb
  *
  *	PS2 Keyboard driver (Avalon slave)
  *
@@ -31,21 +31,17 @@ module ps2kb (
 	input  logic AVL_WRITE, // Avalon-MM Write
 	input  logic AVL_CS, // Avalon-MM Chip Select
 	input  logic [3:0] AVL_BYTE_EN, // Avalon-MM Byte Enable
-	input  logic [3:0] AVL_ADDR, // Avalon-MM Address
+	input  logic [1:0] AVL_ADDR, // Avalon-MM Address
 	input  logic [31:0] AVL_WRITEDATA, // Avalon-MM Write Data
 	output logic [31:0] AVL_READDATA, // Avalon-MM Read Data
 
 	// Exported Conduit
-	inout wire PS2_CLK, PS2_DATA, // Exported Conduit Signal to LEDs
+	inout wire PS2_CLK, PS2_DATA
 
 	// Debug exports
-	// output logic [7:0] debug_keycode,
-	// output logic [2:0] debug_state, debug_counter
+	// output logic [7:0] debug_kdr1, debug_kdr2, debug_kur1, debug_kur2, debug_kc,
+	// output logic [2:0] debug_state
 );
-
-// Debug
-// logic [7:0] debug_keycode_next;
-
 // Static assignments
 
 logic clock_we, data_we, clock_out, data_out, clock_in, data_in;
@@ -58,56 +54,54 @@ enum logic [2:0] {
 logic [2:0] counter, counter_next;
 logic clock_wait, clock_wait_next, error, error_next;
 
-// assign debug_state = state;
-// assign debug_counter = counter;
-
 // Avalon MM functionalities
 
-logic[7:0] keydown[8], keydown_next[8], keyup[8], keyup_next[8];
+logic[7:0] keydown[2], keydown_next[2], keyup[2], keyup_next[2];
 logic[7:0] keycode, keycode_next, keycode_out;
 logic is_release, is_release_next, is_e0code, is_e0code_next;
 
 assign keycode_out = {keycode[7] | is_e0code, keycode[6:0]};
 
+// assign debug_kdr1 = keydown[0];
+// assign debug_kdr2 = keydown[1];
+// assign debug_kur1 = keyup[0];
+// assign debug_kur2 = keyup[1];
+// assign debug_state = state;
+// assign debug_kc = keycode_out;
+
 always_ff @(posedge CLK) begin
 	if(RESET) begin
-		for (int i = 0; i < 8; i++) begin
-			keydown[i] <= 8'h0;
-			keyup[i] <= 8'h0;
-
-			clock_in <= 1'b1;
-			data_in <= 1'b1;
-
-			state <= idle;
-			keycode <= 8'h0;
-			counter <= 3'b0;
-			clock_wait <= 1'b0;
-			error <= 0;
-
-			is_release <= 0;
-			is_e0code <= 0;
-
-			// debug_keycode <= 8'hCC;
-		end
+		keydown[0] <= 8'h00;
+		keydown[1] <= 8'h00;
+		keyup[0] <= 8'h00;
+		keyup[1] <= 8'h00;
+		clock_in <= 1'b1;
+		data_in <= 1'b1;
+
+		state <= idle;
+		keycode <= 8'h0;
+		counter <= 3'b0;
+		clock_wait <= 1'b0;
+		error <= 1'b0;
+
+		is_release <= 1'b0;
+		is_e0code <= 1'b0;
 	end else begin
-		for (int i = 0; i < 4; i++) begin
-			keydown[i] <= keydown_next[i];
-			keyup[i] <= keyup_next[i];
-
-			clock_in <= PS2_CLK;
-			data_in <= PS2_DATA;
-
-			state <= state_next;
-			keycode <= keycode_next;
-			counter <= counter_next;
-			clock_wait <= clock_wait_next;
-			error <= error_next;
-
-			is_release <= is_release_next;
-			is_e0code <= is_e0code_next;
-
-			// debug_keycode <= debug_keycode_next;
-		end
+		keydown[0] <= keydown_next[0];
+		keydown[1] <= keydown_next[1];
+		keyup[0] <= keyup_next[0];
+		keyup[1] <= keyup_next[1];
+		clock_in <= PS2_CLK;
+		data_in <= PS2_DATA;
+
+		state <= state_next;
+		keycode <= keycode_next;
+		counter <= counter_next;
+		clock_wait <= clock_wait_next;
+		error <= error_next;
+
+		is_release <= is_release_next;
+		is_e0code <= is_e0code_next;
 	end
 end
 
@@ -115,30 +109,40 @@ always_comb begin
 	// Avalon IO
 
 	// Defaults
-	for (int i = 0; i < 4; i++) begin
-		keydown_next[i] = keydown[i];
-		keyup_next[i] = keyup[i];
-	end
+	keydown_next[0] = keydown[0];
+	keydown_next[1] = keydown[1];
+	keyup_next[0] = keyup[0];
+	keyup_next[1] = keyup[1];
 
 	AVL_READDATA = 32'hCCCC;
 
 	if (AVL_CS) begin
 		if (AVL_READ) begin
-			if (AVL_ADDR[3] == 1'b0) // Keydown
-				AVL_READDATA = {24'h0, keydown[AVL_ADDR[2:0]]};
-			else
-				AVL_READDATA = {24'h0, keyup[AVL_ADDR[2:0]]};
+			case (AVL_ADDR)
+				2'b00:
+					AVL_READDATA = {24'h0, keydown[0]};
+				2'b01:
+					AVL_READDATA = {24'h0, keydown[1]};
+				2'b10:
+					AVL_READDATA = {24'h0, keyup[0]};
+				2'b11:
+					AVL_READDATA = {24'h0, keyup[1]};
+			endcase
 		end else if (AVL_WRITE && AVL_BYTE_EN[0]) begin
-			if (AVL_ADDR[3] == 1'b0) // Keydown
-				keydown_next[AVL_ADDR[2:0]] = AVL_WRITEDATA[7:0];
-			else
-				keyup_next[AVL_ADDR[2:0]] = AVL_WRITEDATA[7:0];
+			case (AVL_ADDR)
+				2'b00:
+					keydown_next[0] = AVL_WRITEDATA[7:0];
+				2'b01:
+					keydown_next[1] = AVL_WRITEDATA[7:0];
+				2'b10:
+					keyup_next[0] = AVL_WRITEDATA[7:0];
+				2'b11:
+					keyup_next[1] = AVL_WRITEDATA[7:0];
+			endcase
 		end
 	end
 
 	// PS2 Logic
-	debug_keycode_next = debug_keycode;
-
 	state_next = state;
 	counter_next = counter;
 	clock_wait_next = clock_wait;
@@ -154,9 +158,9 @@ always_comb begin
 		idle: begin
 			if (!clock_in && !clock_wait) begin
 				clock_wait_next = 1'b1;
-				if (data_in != 1'b0)
-					error_next = 1'b1;
-				else
+				// if (data_in != 1'b0)
+				// 	error_next = 1'b1;
+				// else
 					error_next = 1'b0;
 			end
 			if (clock_in && clock_wait) begin
@@ -171,11 +175,11 @@ always_comb begin
 			if (!clock_in && !clock_wait) begin
 				clock_wait_next = 1'b1;
 				// keycode_next[counter] = data_in;
-				keycode_next = {keycode[6:0], data_in};
+				keycode_next = {data_in, keycode[7:1]};
 			end
 			if (clock_in && clock_wait) begin
 				clock_wait_next = 1'b0;
-				counter_next = counter+1;
+				counter_next = counter + 3'b1;
 				if (counter == 3'h7)
 					state_next = b_parity;
 			end
@@ -184,10 +188,10 @@ always_comb begin
 		b_parity: begin
 			if (!clock_in && !clock_wait) begin
 				clock_wait_next = 1'b1;
-				if (data_in != keycode[0] ^ keycode[1] ^ keycode[2] ^
-					keycode[3] ^ keycode[4] ^ keycode[5] ^ keycode[6] ^
-					keycode[7])
-					error_next = 1'b1;
+				// if (data_in != keycode[0] ^ keycode[1] ^ keycode[2] ^
+				// 	keycode[3] ^ keycode[4] ^ keycode[5] ^ keycode[6] ^
+				// 	keycode[7])
+				// 	error_next = 1'b1;
 			end
 			if (clock_in && clock_wait) begin
 				clock_wait_next = 1'b0;
@@ -198,12 +202,12 @@ always_comb begin
 		b_end: begin
 			if (!clock_in && !clock_wait) begin
 				clock_wait_next = 1'b1;
-				if (data_in != 1'b1)
-					error_next = 1'b1;
+				// if (data_in != 1'b1)
+				// 	error_next = 1'b1;
 			end
 			if (clock_in && clock_wait) begin
 				clock_wait_next = 1'b0;
-				counter_next = 0;
+				counter_next = 3'b0;
 				if (error)
 					state_next = b_error;
 				else
@@ -213,39 +217,44 @@ always_comb begin
 					state_next = idle;
 				end
 				if (keycode == 8'hF0) begin
-					is_release_next = 1;
+					is_release_next = 1'b1;
 					state_next = idle;
 				end
 			end
 		end
 
 		b_enqueue: begin
-			// debug_keycode_next = keycode;
 			if (is_release) begin
-				if (keyup[counter] == 8'h0) begin
-					keyup_next[counter] = keycode_out;
+				if (keyup[0] == 8'h0) begin
+					keyup_next[0] = keycode_out;
+					state_next = b_fin;
+				end else if (keyup[1] == 8'h0) begin
+					keyup_next[1] = keycode_out;
 					state_next = b_fin;
 				end else
-					state_next = b_enqueue;
+					state_next = b_fin;
 			end else begin
-				if (keydown[counter] == 8'h0) begin
-					keydown_next[counter] = keycode_out;
+				if (keydown[0] == 8'h0) begin
+					keydown_next[0] = keycode_out;
+					state_next = b_fin;
+				end else if (keydown[1] == 8'h0) begin
+					keydown_next[1] = keycode_out;
 					state_next = b_fin;
 				end else
-					state_next = b_enqueue;
+					state_next = b_fin;
 			end
-			counter_next = counter + 1;
 		end
 
 		b_error: begin
-			// debug_keycode_next = 8'hDD;
 			// Just ignore any error
+			keydown_next[0] = 8'had;
+			keydown_next[1] = 8'hde;
 			state_next = b_fin;
 		end
 
 		b_fin: begin
-			is_e0code_next = 0;
-			is_release_next = 0;
+			is_e0code_next = 1'b0;
+			is_release_next = 1'b0;
 			state_next = idle;
 		end
 

osu_fpga_toplevel.qsf

@@ -1118,6 +1118,9 @@ set_instance_assignment -name TSU_REQUIREMENT "10 ns" -from * -to *
 set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
 set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
 set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
-set_global_assignment -name SYSTEMVERILOG_FILE input/ps2.sv
+set_global_assignment -name QIP_FILE otogame/synthesis/otogame.qip
+set_global_assignment -name SDC_FILE timing.sdc
+set_global_assignment -name SYSTEMVERILOG_FILE hexdriver.sv
+set_global_assignment -name SYSTEMVERILOG_FILE input/ps2kb.sv
 set_global_assignment -name SYSTEMVERILOG_FILE osu_fpga_toplevel.sv
 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file

osu_fpga_toplevel.sv

+/**
+*	osu!fpga
+*
+*	An osu!-like rhythm game on DE2-115
+*
+*	See README for more information
+*
+*	Copyright (c) 2017 by Fang Lu and Xutao J. Jiang. See LICENSE file
+*
+*/
 module osu_fpga_toplevel (
 	input logic CLOCK_50,
-	input logic[3:0] KEY,
-	inout wire PS2_KBCLK, PS2_KBDAT,
-	output logic [6:0] HEX0, HEX1, HEX4, HEX6
+	input logic [1:0] KEY,
+	output logic [7:0] LEDG,
+	output logic [17:0] LEDR,
+	output logic [6:0] HEX0, HEX1, HEX2, HEX3, HEX4, HEX5, HEX6, HEX7,
+	output logic [12:0] DRAM_ADDR,
+	output logic [1:0] DRAM_BA,
+	output logic DRAM_CAS_N, DRAM_CKE, DRAM_CS_N,
+	inout wire [31:0] DRAM_DQ,
+	output logic [3:0] DRAM_DQM,
+	output logic DRAM_RAS_N, DRAM_WE_N, DRAM_CLK,
+	inout wire PS2_KBCLK, PS2_KBDAT
 );
+	otogame main_soc (
+		.clk_clk(CLOCK_50),
+		.reset_reset_n(KEY[0]),
+		.sdram_wire_addr(DRAM_ADDR),
+		.sdram_wire_ba(DRAM_BA),
+		.sdram_wire_cas_n(DRAM_CAS_N),
+		.sdram_wire_cke(DRAM_CKE),
+		.sdram_wire_cs_n(DRAM_CS_N),
+		.sdram_wire_dq(DRAM_DQ),
+		.sdram_wire_dqm(DRAM_DQM),
+		.sdram_wire_ras_n(DRAM_RAS_N),
+		.sdram_wire_we_n(DRAM_WE_N),
+		.sdram_clk_clk(DRAM_CLK),
+		.ps2_data_export(PS2_KBDAT),
+		.ps2_clk_export(PS2_KBCLK)
+	);
 
+	// logic[7:0] kdr1, kdr2, kur1, kur2, kc;
+	// logic[2:0] st;
 
-logic [7:0] keycode;
-logic [2:0] state, counter;
-
-ps2 kb(.CLK(CLOCK_50), .RESET(~KEY[0]), .AVL_READ(0), .AVL_WRITE(0), .AVL_CS(0),
-	   .AVL_BYTE_EN(0), .AVL_ADDR(0), .AVL_WRITEDATA(0), .AVL_READDATA(0),
-	   .PS2_CLK(PS2_KBCLK), .PS2_DATA(PS2_KBDAT),
-	   .debug_keycode(keycode), .debug_state(state), .debug_counter(counter));
-
-hexdriver h0(.In(keycode[3:0]), .Out(HEX0));
-hexdriver h1(.In(keycode[7:4]), .Out(HEX1));
-hexdriver h4(.In({1'b0, state}), .Out(HEX4));
-hexdriver h6(.In({1'b0, counter}), .Out(HEX6));
+	// ps2kb kb(.CLK(CLOCK_50), .RESET(~KEY[0]), .AVL_READ(0), .AVL_WRITE(0), .AVL_CS(0),
+	//    .AVL_BYTE_EN(0), .AVL_ADDR(0), .AVL_WRITEDATA(0), .AVL_READDATA(0),
+	//    .PS2_CLK(PS2_KBCLK), .PS2_DATA(PS2_KBDAT), .debug_state(LEDG[2:0]), .debug_kc(LEDR[7:0]),
+	//    .debug_kdr1(kdr1), .debug_kdr2(kdr2), .debug_kur1(kur1), .debug_kur2(kur2));
 
+	// hexdriver kd1l(.In(kdr1[3:0]), .Out(HEX0));
+	// hexdriver kd1h(.In(kdr1[7:4]), .Out(HEX1));
+	// hexdriver kd2l(.In(kdr2[3:0]), .Out(HEX2));
+	// hexdriver kd2h(.In(kdr2[7:4]), .Out(HEX3));
+	// hexdriver ku1l(.In(kur1[3:0]), .Out(HEX4));
+	// hexdriver ku1h(.In(kur1[7:4]), .Out(HEX5));
+	// hexdriver ku2l(.In(kur2[3:0]), .Out(HEX6));
+	// hexdriver ku2h(.In(kur2[7:4]), .Out(HEX7));
+	// hexdriver sthex(.In({1'b0,st}), .Out(HEX7));
 endmodule

ps2kb_hw.tcl

 # TCL File Generated by Component Editor 17.0
-# Sat Nov 18 17:39:55 CST 2017
+# Sat Nov 18 22:12:04 CST 2017
 # DO NOT MODIFY
 
 
 # 
 # ps2kb "PS/2 Keyboard Interface" v1.0
-#  2017.11.18.17:39:54
+#  2017.11.18.22:12:04
 # This module produces key events for PS/2 keyboard
 # 
 
@@ -89,71 +89,71 @@ add_interface_port reset RESET reset Input 1
 
 
 # 
-# connection point ps2_data_conn
-# 
-add_interface ps2_data_conn conduit end
-set_interface_property ps2_data_conn associatedClock clock
-set_interface_property ps2_data_conn associatedReset ""
-set_interface_property ps2_data_conn ENABLED true
-set_interface_property ps2_data_conn EXPORT_OF ""
-set_interface_property ps2_data_conn PORT_NAME_MAP ""
-set_interface_property ps2_data_conn CMSIS_SVD_VARIABLES ""
-set_interface_property ps2_data_conn SVD_ADDRESS_GROUP ""
-
-add_interface_port ps2_data_conn PS2_DATA export Bidir 1
-
-
-# 
-# connection point ps2_clock_conn
-# 
-add_interface ps2_clock_conn conduit end
-set_interface_property ps2_clock_conn associatedClock clock
-set_interface_property ps2_clock_conn associatedReset ""
-set_interface_property ps2_clock_conn ENABLED true
-set_interface_property ps2_clock_conn EXPORT_OF ""
-set_interface_property ps2_clock_conn PORT_NAME_MAP ""
-set_interface_property ps2_clock_conn CMSIS_SVD_VARIABLES ""
-set_interface_property ps2_clock_conn SVD_ADDRESS_GROUP ""
-
-add_interface_port ps2_clock_conn PS2_CLK export Bidir 1
-
-
-# 
-# connection point keystroke_events
-# 
-add_interface keystroke_events avalon end
-set_interface_property keystroke_events addressUnits WORDS
-set_interface_property keystroke_events associatedClock clock
-set_interface_property keystroke_events associatedReset reset
-set_interface_property keystroke_events bitsPerSymbol 8
-set_interface_property keystroke_events burstOnBurstBoundariesOnly false
-set_interface_property keystroke_events burstcountUnits WORDS
-set_interface_property keystroke_events explicitAddressSpan 0
-set_interface_property keystroke_events holdTime 0
-set_interface_property keystroke_events linewrapBursts false
-set_interface_property keystroke_events maximumPendingReadTransactions 0
-set_interface_property keystroke_events maximumPendingWriteTransactions 0
-set_interface_property keystroke_events readLatency 0
-set_interface_property keystroke_events readWaitStates 0
-set_interface_property keystroke_events readWaitTime 0
-set_interface_property keystroke_events setupTime 0
-set_interface_property keystroke_events timingUnits Cycles
-set_interface_property keystroke_events writeWaitTime 0
-set_interface_property keystroke_events ENABLED true
-set_interface_property keystroke_events EXPORT_OF ""
-set_interface_property keystroke_events PORT_NAME_MAP ""
-set_interface_property keystroke_events CMSIS_SVD_VARIABLES ""
-set_interface_property keystroke_events SVD_ADDRESS_GROUP ""
-
-add_interface_port keystroke_events AVL_READ read Input 1
-add_interface_port keystroke_events AVL_WRITE write Input 1
-add_interface_port keystroke_events AVL_WRITEDATA writedata Input 32
-add_interface_port keystroke_events AVL_READDATA readdata Output 32
-add_interface_port keystroke_events AVL_ADDR address Input 4
-add_interface_port keystroke_events AVL_BYTE_EN byteenable Input 4
-add_interface_port keystroke_events AVL_CS chipselect Input 1
-set_interface_assignment keystroke_events embeddedsw.configuration.isFlash 0
-set_interface_assignment keystroke_events embeddedsw.configuration.isMemoryDevice 0
-set_interface_assignment keystroke_events embeddedsw.configuration.isNonVolatileStorage 0
-set_interface_assignment keystroke_events embeddedsw.configuration.isPrintableDevice 0
+# connection point ps2_clk
+# 
+add_interface ps2_clk conduit end
+set_interface_property ps2_clk associatedClock clock
+set_interface_property ps2_clk associatedReset ""
+set_interface_property ps2_clk ENABLED true
+set_interface_property ps2_clk EXPORT_OF ""
+set_interface_property ps2_clk PORT_NAME_MAP ""
+set_interface_property ps2_clk CMSIS_SVD_VARIABLES ""
+set_interface_property ps2_clk SVD_ADDRESS_GROUP ""
+
+add_interface_port ps2_clk PS2_CLK export Bidir 1
+
+
+# 
+# connection point ps2_data
+# 
+add_interface ps2_data conduit end
+set_interface_property ps2_data associatedClock clock
+set_interface_property ps2_data associatedReset ""
+set_interface_property ps2_data ENABLED true
+set_interface_property ps2_data EXPORT_OF ""
+set_interface_property ps2_data PORT_NAME_MAP ""
+set_interface_property ps2_data CMSIS_SVD_VARIABLES ""
+set_interface_property ps2_data SVD_ADDRESS_GROUP ""
+
+add_interface_port ps2_data PS2_DATA export Bidir 1
+
+
+# 
+# connection point key_events
+# 
+add_interface key_events avalon end
+set_interface_property key_events addressUnits WORDS
+set_interface_property key_events associatedClock clock
+set_interface_property key_events associatedReset reset
+set_interface_property key_events bitsPerSymbol 8
+set_interface_property key_events burstOnBurstBoundariesOnly false
+set_interface_property key_events burstcountUnits WORDS
+set_interface_property key_events explicitAddressSpan 0
+set_interface_property key_events holdTime 0
+set_interface_property key_events linewrapBursts false
+set_interface_property key_events maximumPendingReadTransactions 0
+set_interface_property key_events maximumPendingWriteTransactions 0
+set_interface_property key_events readLatency 0
+set_interface_property key_events readWaitStates 0
+set_interface_property key_events readWaitTime 0
+set_interface_property key_events setupTime 0
+set_interface_property key_events timingUnits Cycles
+set_interface_property key_events writeWaitTime 0
+set_interface_property key_events ENABLED true
+set_interface_property key_events EXPORT_OF ""
+set_interface_property key_events PORT_NAME_MAP ""
+set_interface_property key_events CMSIS_SVD_VARIABLES ""
+set_interface_property key_events SVD_ADDRESS_GROUP ""
+
+add_interface_port key_events AVL_READ read Input 1
+add_interface_port key_events AVL_WRITE write Input 1
+add_interface_port key_events AVL_WRITEDATA writedata Input 32
+add_interface_port key_events AVL_READDATA readdata Output 32
+add_interface_port key_events AVL_ADDR address Input 2
+add_interface_port key_events AVL_BYTE_EN byteenable Input 4
+add_interface_port key_events AVL_CS chipselect Input 1
+set_interface_assignment key_events embeddedsw.configuration.isFlash 0
+set_interface_assignment key_events embeddedsw.configuration.isMemoryDevice 0
+set_interface_assignment key_events embeddedsw.configuration.isNonVolatileStorage 0
+set_interface_assignment key_events embeddedsw.configuration.isPrintableDevice 0
 

software/.gitignore

+.settings/
+*_bsp/
+*.d
+*.o
+*.objdump
+*.elf
+*.map

software/osu_main/.cproject

+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<buildSystem id="preference.org.eclipse.cdt.managedbuilder.core.configurationDataProvider.1934673065">
+			<storageModule id="preference.org.eclipse.cdt.managedbuilder.core.configurationDataProvider.1934673065" moduleId="org.eclipse.cdt.core.settings"/>
+		</buildSystem>
+		<cconfiguration id="preference.org.eclipse.cdt.managedbuilder.core.configurationDataProvider.1934673065">
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration buildProperties="" description="" id="preference.org.eclipse.cdt.managedbuilder.core.configurationDataProvider.1934673065" name="Nios II" parent="org.eclipse.cdt.build.core.prefbase.cfg">
+					<folderInfo id="preference.org.eclipse.cdt.managedbuilder.core.configurationDataProvider.1934673065." name="/" resourcePath="">
+						<toolChain id="altera.nios2.mingw.gcc4.1695715586" name="MinGW Nios II GCC4" superClass="altera.nios2.mingw.gcc4">
+							<targetPlatform id="altera.nios2.mingw.gcc4.2130013499" name="Nios II" superClass="altera.nios2.mingw.gcc4"/>
+							<builder buildPath="${workspace_loc://osu_main}" id="altera.tool.gnu.builder.mingw.1243813729" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" superClass="altera.tool.gnu.builder.mingw"/>
+							<tool id="altera.tool.gnu.c.compiler.mingw.1512907719" name="Nios II GCC C Compiler" superClass="altera.tool.gnu.c.compiler.mingw">
+								<inputType id="cdt.managedbuild.tool.gnu.c.compiler.input.1040711810" superClass="cdt.managedbuild.tool.gnu.c.compiler.input"/>
+							</tool>
+							<tool id="altera.tool.gnu.cpp.compiler.mingw.1573963372" name="Nios II GCC C++ Compiler" superClass="altera.tool.gnu.cpp.compiler.mingw">
+								<inputType id="cdt.managedbuild.tool.gnu.cpp.compiler.input.232317194" superClass="cdt.managedbuild.tool.gnu.cpp.compiler.input"/>
+							</tool>
+							<tool id="altera.tool.gnu.archiver.mingw.1684988338" name="Nios II GCC Archiver" superClass="altera.tool.gnu.archiver.mingw"/>
+							<tool id="altera.tool.gnu.c.linker.mingw.1482049235" name="Nios II GCC C Linker" superClass="altera.tool.gnu.c.linker.mingw"/>
+							<tool id="altera.tool.gnu.assembler.mingw.1402728829" name="Nios II GCC Assembler" superClass="altera.tool.gnu.assembler.mingw">
+								<inputType id="cdt.managedbuild.tool.gnu.assembler.input.422854114" superClass="cdt.managedbuild.tool.gnu.assembler.input"/>
+							</tool>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="preference.org.eclipse.cdt.managedbuilder.core.configurationDataProvider.1934673065" moduleId="org.eclipse.cdt.core.settings" name="Nios II">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="osu_main.null.1539812112" name="osu_main"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="preference.org.eclipse.cdt.managedbuilder.core.configurationDataProvider.1934673065;preference.org.eclipse.cdt.managedbuilder.core.configurationDataProvider.1934673065.;altera.tool.gnu.cpp.compiler.mingw.1573963372;cdt.managedbuild.tool.gnu.cpp.compiler.input.232317194">
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="preference.org.eclipse.cdt.managedbuilder.core.configurationDataProvider.1934673065;preference.org.eclipse.cdt.managedbuilder.core.configurationDataProvider.1934673065.;altera.tool.gnu.c.compiler.mingw.1512907719;cdt.managedbuild.tool.gnu.c.compiler.input.1040711810">
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets">
+		<buildTargets>
+			<target name="mem_init_install" path="" targetID="org.eclipse.cdt.build.MakeTargetBuilder">
+				<buildCommand>make</buildCommand>
+				<buildArguments/>
+				<buildTarget>mem_init_install</buildTarget>
+				<stopOnError>true</stopOnError>
+				<useDefaultCommand>false</useDefaultCommand>
+				<runAllBuilders>false</runAllBuilders>
+			</target>
+			<target name="mem_init_generate" path="" targetID="org.eclipse.cdt.build.MakeTargetBuilder">
+				<buildCommand>make</buildCommand>
+				<buildArguments/>
+				<buildTarget>mem_init_generate</buildTarget>
+				<stopOnError>true</stopOnError>
+				<useDefaultCommand>false</useDefaultCommand>
+				<runAllBuilders>false</runAllBuilders>
+			</target>
+			<target name="help" path="" targetID="org.eclipse.cdt.build.MakeTargetBuilder">
+				<buildCommand>make</buildCommand>
+				<buildArguments/>
+				<buildTarget>help</buildTarget>
+				<stopOnError>true</stopOnError>
+				<useDefaultCommand>false</useDefaultCommand>
+				<runAllBuilders>false</runAllBuilders>
+			</target>
+		</buildTargets>
+	</storageModule>
+</cproject>

software/osu_main/.project

+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>osu_main</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>com.altera.sbtgui.project.makefileBuilder</name>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>com.altera.sbtgui.project.makefileBuilder</name>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>com.altera.sbtgui.project.SBTGUINature</nature>
+		<nature>com.altera.sbtgui.project.SBTGUIAppNature</nature>
+		<nature>com.altera.sbtgui.project.SBTGUIManagedNature</nature>
+	</natures>
+</projectDescription>

software/osu_main/create-this-app

+#!/bin/bash
+#
+# This script creates the blank_project application in this directory.
+
+
+BSP_DIR=../otofpga_main_bsp
+QUARTUS_PROJECT_DIR=../../
+NIOS2_APP_GEN_ARGS="--elf-name osu_main.elf --no-src --set OBJDUMP_INCLUDE_SOURCE 1"
+
+
+# First, check to see if $SOPC_KIT_NIOS2 environmental variable is set.
+# This variable is required for the command line tools to execute correctly.
+if [ -z "${SOPC_KIT_NIOS2}" ]
+then
+    echo Required \$SOPC_KIT_NIOS2 Environmental Variable is not set!
+    exit 1
+fi
+
+
+# Also make sure that the APP has not been created already.  Check for
+# existence of Makefile in the app directory
+if [ -f ./Makefile ]
+then
+    echo Application has already been created!  Delete Makefile if you want to create a new application makefile
+    exit 1
+fi
+
+
+# We are selecting hal_default bsp because it supports this application.
+# Check to see if the hal_default has already been generated by checking for
+# existence of the public.mk file.  If not, we need to run
+# create-this-bsp file to generate the bsp.
+if [ ! -f ${BSP_DIR}/public.mk ]; then
+    # Since BSP doesn't exist, create the BSP
+    # Pass any command line arguments passed to this script to the BSP.
+    pushd ${BSP_DIR} >> /dev/null
+    ./create-this-bsp "$@" || {
+        echo "create-this-bsp failed"
+        exit 1
+    }
+    popd >> /dev/null
+fi
+
+
+# Don't run make if create-this-app script is called with --no-make arg
+SKIP_MAKE=
+while [ $# -gt 0 ]
+do
+  case "$1" in
+      --no-make)
+          SKIP_MAKE=1
+          ;;
+  esac
+  shift
+done
+
+
+# Now we also need to go copy the sources for this application to the
+# local directory.
+find "${SOPC_KIT_NIOS2}/examples/software/blank_project/" -name '*.c' -or -name '*.h' -or -name 'hostfs*' | xargs -i cp -L {} ./ || {
+        echo "failed during copying example source files"
+        exit 1
+}
+
+find "${SOPC_KIT_NIOS2}/examples/software/blank_project/" -name 'readme.txt' -or -name 'Readme.txt' | xargs -i cp -L {} ./ || {
+        echo "failed copying readme file"
+}
+
+if [ -d "${SOPC_KIT_NIOS2}/examples/software/blank_project/system" ]
+then
+        cp -RL "${SOPC_KIT_NIOS2}/examples/software/blank_project/system" . || {
+                echo "failed during copying project support files"
+                exit 1
+        }
+fi
+
+chmod -R +w . || {
+        echo "failed during changing file permissions"
+        exit 1
+}
+
+cmd="nios2-app-generate-makefile --bsp-dir ${BSP_DIR} --set QUARTUS_PROJECT_DIR=${QUARTUS_PROJECT_DIR} ${NIOS2_APP_GEN_ARGS}"
+
+echo "create-this-app: Running \"${cmd}\""
+$cmd || {
+    echo "nios2-app-generate-makefile failed"
+    exit 1
+}
+
+if [ -z "$SKIP_MAKE" ]; then
+        cmd="make"
+
+        echo "create-this-app: Running \"$cmd\""
+        $cmd || {
+        echo "make failed"
+            exit 1
+        }
+
+        echo
+        echo "To download and run the application:"
+        echo "    1. Make sure the board is connected to the system."
+        echo "    2. Run 'nios2-configure-sof <SOF_FILE_PATH>' to configure the FPGA with the hardware design."
+        echo "    3. If you have a stdio device, run 'nios2-terminal' in a different shell."
+        echo "    4. Run 'make download-elf' from the application directory."
+        echo
+        echo "To debug the application:"
+        echo "    Import the project into Nios II Software Build Tools for Eclipse."
+        echo "    Refer to Nios II Software Build Tools for Eclipse Documentation for more information."
+        echo
+        echo -e ""
+fi
+
+
+exit 0

software/osu_main/readme.txt

+This template is starting point for creating a project based on your custom C code.
+It will provide you a default project to which you can add your software files. To
+add files to a project, manually copy the file into the application directory (e.g. 
+using Windows Explorer), then right click on your application project and select 
+refresh.
+
+You can also add files to the project using the Nios II Software Build Tools for Eclipse import function. 
+Select File -> Import. 
+Expand General and select File System in the Import Window and click Next.
+Identify the appropriate source and destination directories.
+Check the files you want to add and click Finish.

software/osu_main/src/main.c

+/*
+ * main.c
+ *
+ *  Created on: Nov 18, 2017
+ *      Author: ilufang
+ */
+
+#include <stdio.h>
+#include <inttypes.h>
+
+#include "system.h"
+
+volatile uint32_t *kbdr = (uint32_t *) KEYBOARD_BASE;
+
+int main() {
+	printf("Hello world\n");
+
+	while (1) {
+		for (int i=0; i<2; i++) {
+			if (kbdr[i]) {
+				printf("Key pressed (%d): %02x\n", i, (int)kbdr[i]);
+				kbdr[i] = 0;
+			}
+		}
+		for (int i=2; i<4; i++) {
+			if (kbdr[i]) {
+				printf("Key released (%d): %02x\n", i, (int)kbdr[i]);
+				kbdr[i] = 0;
+			}
+		}
+	}
+
+	return 0;
+}

timing.sdc

+# Create Clocks
+create_clock -name {Clk} -period 20.000 -waveform { 0.000 10.000 } [get_ports {CLOCK_50}]
+# create_generated_clock -name {lab9_qsystem|altpll_0|sd1|pll|clk[0]} -source [get_pins {lab9_qsystem|altpll_0|sd1|pll|inclk[0]}] -duty_cycle 50.000 -multiply_by 1 -phase -54.000 -master_clock {CLOCK_50} [get_pins {lab9_qsystem|altpll_0|sd1|pll|clk[0]}]
+
+# Constrain the input I/O path
+set_input_delay -clock {Clk} -max 3 [all_inputs]
+set_input_delay -clock {Clk} -min 2 [all_inputs]
+set_input_delay -add_delay -max -clock [get_clocks {Clk}]  3.000 [get_ports {KEY[0]}]
+set_input_delay -add_delay -min -clock [get_clocks {Clk}]  2.000 [get_ports {KEY[0]}]
+set_input_delay -add_delay -max -clock [get_clocks {Clk}]  3.000 [get_ports {KEY[1]}]
+set_input_delay -add_delay -min -clock [get_clocks {Clk}]  2.000 [get_ports {KEY[1]}]
+set_input_delay -add_delay -max -clock [get_clocks {Clk}]  3.000 [get_ports {KEY[2]}]
+set_input_delay -add_delay -min -clock [get_clocks {Clk}]  2.000 [get_ports {KEY[2]}]
+set_input_delay -add_delay -max -clock [get_clocks {Clk}]  3.000 [get_ports {KEY[3]}]
+set_input_delay -add_delay -min -clock [get_clocks {Clk}]  2.000 [get_ports {KEY[3]}]
+set_input_delay -add_delay -max -clock [get_clocks {Clk}]  3.000 [get_ports {PS2_KBCLK}]
+set_input_delay -add_delay -min -clock [get_clocks {Clk}]  2.000 [get_ports {PS2_KBCLK}]
+set_input_delay -add_delay -max -clock [get_clocks {Clk}]  3.000 [get_ports {PS2_KBDAT}]
+set_input_delay -add_delay -min -clock [get_clocks {Clk}]  2.000 [get_ports {PS2_KBDAT}]
+
+# Constrain the output I/O path
+set_output_delay -clock {Clk} 2 [all_outputs]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {LEDG[0]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {LEDG[1]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {LEDG[2]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {LEDG[3]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {LEDG[4]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {LEDG[5]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {LEDG[6]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {LEDG[7]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX0[0]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX0[1]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX0[2]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX0[3]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX0[4]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX0[5]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX0[6]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX1[0]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX1[1]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX1[2]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX1[3]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX1[4]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX1[5]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX1[6]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX2[0]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX2[1]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX2[2]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX2[3]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX2[4]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX2[5]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX2[6]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX3[0]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX3[1]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX3[2]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX3[3]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX3[4]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX3[5]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {HEX3[6]}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {PS2_KBCLK}]
+set_output_delay -add_delay  -clock [get_clocks {Clk}]  2.000 [get_ports {PS2_KBDAT}]