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Commit a367a0c7 authored by David Sidler's avatar David Sidler
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improving parametrization of tcp stack

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hdl/common/network_stack.sv
+ 0
− 341
View file @ a367a0c7
......@@ -30,9 +30,6 @@
`define IP_VERSION4
`define POINTER_CHASING
`define UDP
`include "davos_types.svh"
module network_stack #(
......@@ -312,255 +309,8 @@ tcp_stack #(
.session_count_valid(session_count_valid),
.session_count_data(session_count_data)
);
//TODO
/*logic[15:0] regSessionCount_V;
logic regSessionCount_V_ap_vld;
generate
if (RX_DDR_BYPASS_EN == 1) begin
//RX Buffer bypass data streams
wire axis_rxbuffer2app_tvalid;
wire axis_rxbuffer2app_tready;
wire[63:0] axis_rxbuffer2app_tdata;
wire[7:0] axis_rxbuffer2app_tkeep;
wire axis_rxbuffer2app_tlast;
wire axis_tcp2rxbuffer_tvalid;
wire axis_tcp2rxbuffer_tready;
wire[63:0] axis_tcp2rxbuffer_tdata;
wire[7:0] axis_tcp2rxbuffer_tkeep;
wire axis_tcp2rxbuffer_tlast;
wire[31:0] rx_buffer_data_count;
end
else begin
assign s_axis_read_sts[ddrPortNetworkRx].ready = 1'b1;
end
endgenerate
assign s_axis_read_sts[ddrPortNetworkTx].ready = 1'b1;
//hack for now //TODO
wire[71:0] axis_write_cmd_data [1:0];
wire[71:0] axis_read_cmd_data [1:0];
generate
if (RX_DDR_BYPASS_EN == 0) begin
assign m_axis_write_cmd[ddrPortNetworkRx].address = axis_write_cmd_data[ddrPortNetworkRx][63:32];
assign m_axis_write_cmd[ddrPortNetworkRx].length = axis_write_cmd_data[ddrPortNetworkRx][22:0];
assign m_axis_read_cmd[ddrPortNetworkRx].address = axis_read_cmd_data[ddrPortNetworkRx][63:32];
assign m_axis_read_cmd[ddrPortNetworkRx].length = axis_read_cmd_data[ddrPortNetworkRx][22:0];
end
endgenerate
assign m_axis_write_cmd[ddrPortNetworkTx].address = axis_write_cmd_data[ddrPortNetworkTx][63:32];
assign m_axis_write_cmd[ddrPortNetworkTx].length = axis_write_cmd_data[ddrPortNetworkTx][22:0];
assign m_axis_read_cmd[ddrPortNetworkTx].address = axis_read_cmd_data[ddrPortNetworkTx][63:32];
assign m_axis_read_cmd[ddrPortNetworkTx].length = axis_read_cmd_data[ddrPortNetworkTx][22:0];
/*toe_ip toe_inst (
// Data output
.m_axis_tcp_data_TVALID(axis_toe_to_toe_slice.valid), // output AXI_M_Stream_TVALID
.m_axis_tcp_data_TREADY(axis_toe_to_toe_slice.ready), // input AXI_M_Stream_TREADY
.m_axis_tcp_data_TDATA(axis_toe_to_toe_slice.data), // output [63 : 0] AXI_M_Stream_TDATA
.m_axis_tcp_data_TKEEP(axis_toe_to_toe_slice.keep), // output [7 : 0] AXI_M_Stream_TSTRB
.m_axis_tcp_data_TLAST(axis_toe_to_toe_slice.last), // output [0 : 0] AXI_M_Stream_TLAST
// Data input
.s_axis_tcp_data_TVALID(axis_toe_slice_to_toe.valid), // input AXI_S_Stream_TVALID
.s_axis_tcp_data_TREADY(axis_toe_slice_to_toe.ready), // output AXI_S_Stream_TREADY
.s_axis_tcp_data_TDATA(axis_toe_slice_to_toe.data), // input [63 : 0] AXI_S_Stream_TDATA
.s_axis_tcp_data_TKEEP(axis_toe_slice_to_toe.keep), // input [7 : 0] AXI_S_Stream_TKEEP
.s_axis_tcp_data_TLAST(axis_toe_slice_to_toe.last), // input [0 : 0] AXI_S_Stream_TLAST
`ifndef RX_DDR_BYPASS
// rx read commands
.m_axis_rxread_cmd_TVALID(m_axis_read_cmd[ddrPortNetworkRx].valid),
.m_axis_rxread_cmd_TREADY(m_axis_read_cmd[ddrPortNetworkRx].ready),
.m_axis_rxread_cmd_TDATA(axis_read_cmd_data[ddrPortNetworkRx]),
// rx write commands
.m_axis_rxwrite_cmd_TVALID(m_axis_write_cmd[ddrPortNetworkRx].valid),
.m_axis_rxwrite_cmd_TREADY(m_axis_write_cmd[ddrPortNetworkRx].ready),
.m_axis_rxwrite_cmd_TDATA(axis_write_cmd_data[ddrPortNetworkRx]),
// rx write status
.s_axis_rxwrite_sts_TVALID(s_axis_write_sts[ddrPortNetworkRx].valid),
.s_axis_rxwrite_sts_TREADY(s_axis_write_sts[ddrPortNetworkRx].ready),
.s_axis_rxwrite_sts_TDATA(s_axis_write_sts[ddrPortNetworkRx].data),
// rx buffer read path
.s_axis_rxread_data_TVALID(axis_rxread_data.valid),
.s_axis_rxread_data_TREADY(axis_rxread_data.ready),
.s_axis_rxread_data_TDATA(axis_rxread_data.data),
.s_axis_rxread_data_TKEEP(axis_rxread_data.keep),
.s_axis_rxread_data_TLAST(axis_rxread_data.last),
// rx buffer write path
.m_axis_rxwrite_data_TVALID(axis_rxwrite_data.valid),
.m_axis_rxwrite_data_TREADY(axis_rxwrite_data.ready),
.m_axis_rxwrite_data_TDATA(axis_rxwrite_data.data),
.m_axis_rxwrite_data_TKEEP(axis_rxwrite_data.keep),
.m_axis_rxwrite_data_TLAST(axis_rxwrite_data.last),
`else
// rx buffer read path
.s_axis_rxread_data_TVALID(axis_rxbuffer2app_tvalid),
.s_axis_rxread_data_TREADY(axis_rxbuffer2app_tready),
.s_axis_rxread_data_TDATA(axis_rxbuffer2app_tdata),
.s_axis_rxread_data_TKEEP(axis_rxbuffer2app_tkeep),
.s_axis_rxread_data_TLAST(axis_rxbuffer2app_tlast),
// rx buffer write path
.m_axis_rxwrite_data_TVALID(axis_tcp2rxbuffer_tvalid),
.m_axis_rxwrite_data_TREADY(axis_tcp2rxbuffer_tready),
.m_axis_rxwrite_data_TDATA(axis_tcp2rxbuffer_tdata),
.m_axis_rxwrite_data_TKEEP(axis_tcp2rxbuffer_tkeep),
.m_axis_rxwrite_data_TLAST(axis_tcp2rxbuffer_tlast),
`endif
// tx read commands
.m_axis_txread_cmd_TVALID(m_axis_read_cmd[ddrPortNetworkTx].valid),
.m_axis_txread_cmd_TREADY(m_axis_read_cmd[ddrPortNetworkTx].ready),
.m_axis_txread_cmd_TDATA(axis_read_cmd_data[ddrPortNetworkTx]),
//tx write commands
.m_axis_txwrite_cmd_TVALID(m_axis_write_cmd[ddrPortNetworkTx].valid),
.m_axis_txwrite_cmd_TREADY(m_axis_write_cmd[ddrPortNetworkTx].ready),
.m_axis_txwrite_cmd_TDATA(axis_write_cmd_data[ddrPortNetworkTx]),
// tx write status
.s_axis_txwrite_sts_TVALID(s_axis_write_sts[ddrPortNetworkTx].valid),
.s_axis_txwrite_sts_TREADY(s_axis_write_sts[ddrPortNetworkTx].ready),
.s_axis_txwrite_sts_TDATA(s_axis_write_sts[ddrPortNetworkTx].data),
// tx read path
.s_axis_txread_data_TVALID(axis_txread_data.valid),
.s_axis_txread_data_TREADY(axis_txread_data.ready),
.s_axis_txread_data_TDATA(axis_txread_data.data),
.s_axis_txread_data_TKEEP(axis_txread_data.keep),
.s_axis_txread_data_TLAST(axis_txread_data.last),
// tx write path
.m_axis_txwrite_data_TVALID(axis_txwrite_data.valid),
.m_axis_txwrite_data_TREADY(axis_txwrite_data.ready),
.m_axis_txwrite_data_TDATA(axis_txwrite_data.data),
.m_axis_txwrite_data_TKEEP(axis_txwrite_data.keep),
.m_axis_txwrite_data_TLAST(axis_txwrite_data.last),
/// SmartCAM I/F ///
.m_axis_session_upd_req_TVALID(upd_req_TVALID),
.m_axis_session_upd_req_TREADY(upd_req_TREADY),
.m_axis_session_upd_req_TDATA(upd_req_TDATA),
.s_axis_session_upd_rsp_TVALID(upd_rsp_TVALID),
.s_axis_session_upd_rsp_TREADY(upd_rsp_TREADY),
.s_axis_session_upd_rsp_TDATA(upd_rsp_TDATA),
.m_axis_session_lup_req_TVALID(lup_req_TVALID),
.m_axis_session_lup_req_TREADY(lup_req_TREADY),
.m_axis_session_lup_req_TDATA(lup_req_TDATA),
.s_axis_session_lup_rsp_TVALID(lup_rsp_TVALID),
.s_axis_session_lup_rsp_TREADY(lup_rsp_TREADY),
.s_axis_session_lup_rsp_TDATA(lup_rsp_TDATA),
/* Application Interface */
// listen&close port
/*.s_axis_listen_port_req_TVALID(s_axis_listen_port.valid),
.s_axis_listen_port_req_TREADY(s_axis_listen_port.ready),
.s_axis_listen_port_req_TDATA(s_axis_listen_port.data),
.m_axis_listen_port_rsp_TVALID(m_axis_listen_port_status.valid),
.m_axis_listen_port_rsp_TREADY(m_axis_listen_port_status.ready),
.m_axis_listen_port_rsp_TDATA(m_axis_listen_port_status.data),
// notification & read request
.m_axis_notification_TVALID(m_axis_notifications.valid),
.m_axis_notification_TREADY(m_axis_notifications.ready),
.m_axis_notification_TDATA(m_axis_notifications.data),
.s_axis_rx_data_req_TVALID(s_axis_read_package.valid),
.s_axis_rx_data_req_TREADY(s_axis_read_package.ready),
.s_axis_rx_data_req_TDATA(s_axis_read_package.data),
// open&close connection
.s_axis_open_conn_req_TVALID(s_axis_open_connection.valid),
.s_axis_open_conn_req_TREADY(s_axis_open_connection.ready),
.s_axis_open_conn_req_TDATA(s_axis_open_connection.data),
.m_axis_open_conn_rsp_TVALID(m_axis_open_status.valid),
.m_axis_open_conn_rsp_TREADY(m_axis_open_status.ready),
.m_axis_open_conn_rsp_TDATA(m_axis_open_status.data),
.s_axis_close_conn_req_TVALID(s_axis_close_connection.valid),
.s_axis_close_conn_req_TREADY(s_axis_close_connection.ready),
.s_axis_close_conn_req_TDATA(s_axis_close_connection.data),
// rx data
.m_axis_rx_data_rsp_metadata_TVALID(m_axis_rx_metadata.valid),
.m_axis_rx_data_rsp_metadata_TREADY(m_axis_rx_metadata.ready),
.m_axis_rx_data_rsp_metadata_TDATA(m_axis_rx_metadata.data),
.m_axis_rx_data_rsp_TVALID(m_axis_rx_data.valid),
.m_axis_rx_data_rsp_TREADY(m_axis_rx_data.ready),
.m_axis_rx_data_rsp_TDATA(m_axis_rx_data.data),
.m_axis_rx_data_rsp_TKEEP(m_axis_rx_data.keep),
.m_axis_rx_data_rsp_TLAST(m_axis_rx_data.last),
// tx data
.s_axis_tx_data_req_metadata_TVALID(s_axis_tx_metadata.valid),
.s_axis_tx_data_req_metadata_TREADY(s_axis_tx_metadata.ready),
.s_axis_tx_data_req_metadata_TDATA(s_axis_tx_metadata.data),
.s_axis_tx_data_req_TVALID(s_axis_tx_data.valid),
.s_axis_tx_data_req_TREADY(s_axis_tx_data.ready),
.s_axis_tx_data_req_TDATA(s_axis_tx_data.data),
.s_axis_tx_data_req_TKEEP(s_axis_tx_data.keep),
.s_axis_tx_data_req_TLAST(s_axis_tx_data.last),
.m_axis_tx_data_rsp_TVALID(m_axis_tx_status.valid),
.m_axis_tx_data_rsp_TREADY(m_axis_tx_status.ready),
.m_axis_tx_data_rsp_TDATA(m_axis_tx_status.data),
.myIpAddress_V(toe_ip_address),
.regSessionCount_V(regSessionCount_V),
.regSessionCount_V_ap_vld(regSessionCount_V_ap_vld),
`ifdef RX_DDR_BYPASS
//for external RX Buffer
.axis_data_count_V(rx_buffer_data_count),
.axis_max_data_count_V(32'd2048),
`endif
.aclk(net_clk), // input aclk
.aresetn(net_aresetn) // input aresetn
);
`ifdef RX_DDR_BYPASS
//RX BUFFER FIFO
axis_data_fifo_64_d2048 rx_buffer_fifo (
.s_axis_aresetn(net_aresetn), // input wire s_axis_aresetn
.s_axis_aclk(net_clk), // input wire s_axis_aclk
.s_axis_tvalid(axis_tcp2rxbuffer_tvalid),
.s_axis_tready(axis_tcp2rxbuffer_tready),
.s_axis_tdata(axis_tcp2rxbuffer_tdata),
.s_axis_tkeep(axis_tcp2rxbuffer_tkeep),
.s_axis_tlast(axis_tcp2rxbuffer_tlast),
.m_axis_tvalid(axis_rxbuffer2app_tvalid),
.m_axis_tready(axis_rxbuffer2app_tready),
.m_axis_tdata(axis_rxbuffer2app_tdata),
.m_axis_tkeep(axis_rxbuffer2app_tkeep),
.m_axis_tlast(axis_rxbuffer2app_tlast),
.axis_data_count(rx_buffer_data_count[11:0])
);
assign rx_buffer_data_count[31:12] = 20'h0;
`endif
SmartCamCtl SmartCamCtl_inst
(
.clk(net_clk),
.rst(~net_aresetn),
.led0(),//(sc_led0),
.led1(),//(sc_led1),
.cam_ready(),//(cam_ready),
.lup_req_valid(lup_req_TVALID),
.lup_req_ready(lup_req_TREADY),
.lup_req_din(lup_req_TDATA),
.lup_rsp_valid(lup_rsp_TVALID),
.lup_rsp_ready(lup_rsp_TREADY),
.lup_rsp_dout(lup_rsp_TDATA),
.upd_req_valid(upd_req_TVALID),
.upd_req_ready(upd_req_TREADY),
.upd_req_din(upd_req_TDATA),
.upd_rsp_valid(upd_rsp_TVALID),
.upd_rsp_ready(upd_rsp_TREADY),
.upd_rsp_dout(upd_rsp_TDATA),
.debug()
);*/
/*
* UDP/IP
*/
......@@ -585,97 +335,6 @@ udp_stack #(
.listen_port(16'h1389)
);
/*axis_meta #(.WIDTH(48)) axis_ip_to_udp_meta();
axis_meta #(.WIDTH(48)) axis_udp_to_ip_meta();
axi_stream #(.WIDTH(WIDTH)) axis_ip_to_udp_data();
axi_stream #(.WIDTH(WIDTH)) axis_udp_to_ip_data();
/*axis_meta #(.WIDTH(176)) s_axis_udp_metadata();
axis_meta #(.WIDTH(176)) m_axis_udp_metadata();
axi_stream #(.WIDTH(WIDTH)) s_axis_udp_data();
axi_stream #(.WIDTH(WIDTH)) m_axis_udp_data();*/
/*ipv4_ip ipv4_inst (
.local_ipv4_address_V(local_ip_address[31:0]), // input wire [31 : 0] local_ipv4_address_V
.protocol_V(8'h11), //UDP_PROTOCOL
//RX
.s_axis_rx_data_TVALID(axis_udp_slice_to_udp.valid), // input wire s_axis_rx_data_TVALID
.s_axis_rx_data_TREADY(axis_udp_slice_to_udp.ready), // output wire s_axis_rx_data_TREADY
.s_axis_rx_data_TDATA(axis_udp_slice_to_udp.data), // input wire [63 : 0] s_axis_rx_data_TDATA
.s_axis_rx_data_TKEEP(axis_udp_slice_to_udp.keep), // input wire [7 : 0] s_axis_rx_data_TKEEP
.s_axis_rx_data_TLAST(axis_udp_slice_to_udp.last), // input wire [0 : 0] s_axis_rx_data_TLAST
.m_axis_rx_meta_TVALID(axis_ip_to_udp_meta.valid), // output wire m_axis_rx_meta_TVALID
.m_axis_rx_meta_TREADY(axis_ip_to_udp_meta.ready), // input wire m_axis_rx_meta_TREADY
.m_axis_rx_meta_TDATA(axis_ip_to_udp_meta.data), // output wire [47 : 0] m_axis_rx_meta_TDATA
.m_axis_rx_data_TVALID(axis_ip_to_udp_data.valid), // output wire m_axis_rx_data_TVALID
.m_axis_rx_data_TREADY(axis_ip_to_udp_data.ready), // input wire m_axis_rx_data_TREADY
.m_axis_rx_data_TDATA(axis_ip_to_udp_data.data), // output wire [63 : 0] m_axis_rx_data_TDATA
.m_axis_rx_data_TKEEP(axis_ip_to_udp_data.keep), // output wire [7 : 0] m_axis_rx_data_TKEEP
.m_axis_rx_data_TLAST(axis_ip_to_udp_data.last), // output wire [0 : 0] m_axis_rx_data_TLAST
//TX
.s_axis_tx_meta_TVALID(axis_udp_to_ip_meta.valid), // input wire s_axis_tx_meta_TVALID
.s_axis_tx_meta_TREADY(axis_udp_to_ip_meta.ready), // output wire s_axis_tx_meta_TREADY
.s_axis_tx_meta_TDATA(axis_udp_to_ip_meta.data), // input wire [47 : 0] s_axis_tx_meta_TDATA
.s_axis_tx_data_TVALID(axis_udp_to_ip_data.valid), // input wire s_axis_tx_data_TVALID
.s_axis_tx_data_TREADY(axis_udp_to_ip_data.ready), // output wire s_axis_tx_data_TREADY
.s_axis_tx_data_TDATA(axis_udp_to_ip_data.data), // input wire [63 : 0] s_axis_tx_data_TDATA
.s_axis_tx_data_TKEEP(axis_udp_to_ip_data.keep), // input wire [7 : 0] s_axis_tx_data_TKEEP
.s_axis_tx_data_TLAST(axis_udp_to_ip_data.last), // input wire [0 : 0] s_axis_tx_data_TLAST
.m_axis_tx_data_TVALID(axis_udp_to_udp_slice.valid), // output wire m_axis_tx_data_TVALID
.m_axis_tx_data_TREADY(axis_udp_to_udp_slice.ready), // input wire m_axis_tx_data_TREADY
.m_axis_tx_data_TDATA(axis_udp_to_udp_slice.data), // output wire [63 : 0] m_axis_tx_data_TDATA
.m_axis_tx_data_TKEEP(axis_udp_to_udp_slice.keep), // output wire [7 : 0] m_axis_tx_data_TKEEP
.m_axis_tx_data_TLAST(axis_udp_to_udp_slice.last), // output wire [0 : 0] m_axis_tx_data_TLAST
.aclk(net_clk), // input wire aclk
.aresetn(net_aresetn) // input wire aresetn
);
udp_ip udp_inst (
//.reg_ip_address_V(udp_ip_address), // input wire [127 : 0] reg_ip_address_V
.reg_listen_port_V(16'h8000),
//RX
.s_axis_rx_meta_TVALID(axis_ip_to_udp_meta.valid),
.s_axis_rx_meta_TREADY(axis_ip_to_udp_meta.ready),
.s_axis_rx_meta_TDATA(axis_ip_to_udp_meta.data),
.s_axis_rx_data_TVALID(axis_ip_to_udp_data.valid), // input wire s_axis_rx_data_TVALID
.s_axis_rx_data_TREADY(axis_ip_to_udp_data.ready), // output wire s_axis_rx_data_TREADY
.s_axis_rx_data_TDATA(axis_ip_to_udp_data.data), // input wire [63 : 0] s_axis_rx_data_TDATA
.s_axis_rx_data_TKEEP(axis_ip_to_udp_data.keep), // input wire [7 : 0] s_axis_rx_data_TKEEP
.s_axis_rx_data_TLAST(axis_ip_to_udp_data.last), // input wire [0 : 0] s_axis_rx_data_TLAST
.m_axis_rx_meta_TVALID(m_axis_udp_rx_metadata.valid), // output wire m_axis_rx_meta_TVALID
.m_axis_rx_meta_TREADY(m_axis_udp_rx_metadata.ready), // input wire m_axis_rx_meta_TREADY
.m_axis_rx_meta_TDATA(m_axis_udp_rx_metadata.data), // output wire [159 : 0] m_axis_rx_meta_TDATA
.m_axis_rx_data_TVALID(m_axis_udp_rx_data.valid), // output wire m_axis_rx_data_TVALID
.m_axis_rx_data_TREADY(m_axis_udp_rx_data.ready), // input wire m_axis_rx_data_TREADY
.m_axis_rx_data_TDATA(m_axis_udp_rx_data.data), // output wire [63 : 0] m_axis_rx_data_TDATA
.m_axis_rx_data_TKEEP(m_axis_udp_rx_data.keep), // output wire [7 : 0] m_axis_rx_data_TKEEP
.m_axis_rx_data_TLAST(m_axis_udp_rx_data.last), // output wire [0 : 0] m_axis_rx_data_TLAST
//TX
.s_axis_tx_meta_TVALID(s_axis_udp_tx_metadata.valid),
.s_axis_tx_meta_TREADY(s_axis_udp_tx_metadata.ready),
.s_axis_tx_meta_TDATA(s_axis_udp_tx_metadata.data),
.s_axis_tx_data_TVALID(s_axis_udp_tx_data.valid), // input wire s_axis_tx_data_TVALID
.s_axis_tx_data_TREADY(s_axis_udp_tx_data.ready), // output wire s_axis_tx_data_TREADY
.s_axis_tx_data_TDATA(s_axis_udp_tx_data.data), // input wire [63 : 0] s_axis_tx_data_TDATA
.s_axis_tx_data_TKEEP(s_axis_udp_tx_data.keep), // input wire [7 : 0] s_axis_tx_data_TKEEP
.s_axis_tx_data_TLAST(s_axis_udp_tx_data.last), // input wire [0 : 0] s_axis_tx_data_TLAST
.m_axis_tx_meta_TVALID(axis_udp_to_ip_meta.valid), // input wire m_axis_tx_meta_TVALID
.m_axis_tx_meta_TREADY(axis_udp_to_ip_meta.ready), // output wire m_axis_tx_meta_TREADY
.m_axis_tx_meta_TDATA(axis_udp_to_ip_meta.data), // input wire [159 : 0] m_axis_tx_meta_TDATA
.m_axis_tx_data_TVALID(axis_udp_to_ip_data.valid), // output wire m_axis_tx_data_TVALID
.m_axis_tx_data_TREADY(axis_udp_to_ip_data.ready), // input wire m_axis_tx_data_TREADY
.m_axis_tx_data_TDATA(axis_udp_to_ip_data.data), // output wire [63 : 0] m_axis_tx_data_TDATA
.m_axis_tx_data_TKEEP(axis_udp_to_ip_data.keep), // output wire [7 : 0] m_axis_tx_data_TKEEP
.m_axis_tx_data_TLAST(axis_udp_to_ip_data.last), // output wire [0 : 0] m_axis_tx_data_TLAST
.aclk(net_clk), // input wire aclk
.aresetn(net_aresetn) // input wire aresetn
);*/
/*
* Test Dropper
......
hdl/common/tcp_stack.sv
+ 140
− 35
View file @ a367a0c7
......@@ -29,8 +29,6 @@
`include "davos_types.svh"
`define RX_DDR_BYPASS 1
module tcp_stack #(
parameter TCP_EN = 1,
parameter WIDTH = 64,
......@@ -130,39 +128,27 @@ axis_meta #(.WIDTH(16)) axis_rx_metadata();
axis_meta #(.WIDTH(32)) axis_tx_metadata();
//TODO fix generate
//generate
//if (RX_DDR_BYPASS_EN == 1) begin
`ifdef RX_DDR_BYPASS
//RX Buffer bypass data streams
axi_stream #(.WIDTH(WIDTH)) axis_rxbuffer2app();
axi_stream #(.WIDTH(WIDTH)) axis_tcp2rxbuffer();
wire[31:0] rx_buffer_data_count;
reg[15:0] rx_buffer_data_count_reg;
reg[15:0] rx_buffer_data_count_reg2;
`else
//end
//else begin
assign s_axis_mem_read_sts[ddrPortNetworkRx].ready = 1'b1;
`endif
//end
//endgenerate
wire[31:0] rx_buffer_data_count;
reg[15:0] rx_buffer_data_count_reg;
reg[15:0] rx_buffer_data_count_reg2;
axi_stream #(.WIDTH(WIDTH)) axis_rxbuffer2app();
axi_stream #(.WIDTH(WIDTH)) axis_tcp2rxbuffer();
if (RX_DDR_BYPASS_EN == 0) begin
assign s_axis_mem_read_sts[ddrPortNetworkRx].ready = 1'b1;
end
assign s_axis_mem_read_sts[ddrPortNetworkTx].ready = 1'b1;
//hack for now //TODO
wire[71:0] axis_write_cmd_data [1:0];
wire[71:0] axis_read_cmd_data [1:0];
//generate
if (RX_DDR_BYPASS_EN == 0) begin
assign m_axis_mem_write_cmd[ddrPortNetworkRx].address = {32'h0000_0000, axis_write_cmd_data[ddrPortNetworkRx][63:32]};
assign m_axis_mem_write_cmd[ddrPortNetworkRx].length = {9'h00, axis_write_cmd_data[ddrPortNetworkRx][22:0]};
assign m_axis_mem_read_cmd[ddrPortNetworkRx].address = {32'h0000_0000, axis_read_cmd_data[ddrPortNetworkRx][63:32]};
assign m_axis_mem_read_cmd[ddrPortNetworkRx].length = {9'h00, axis_read_cmd_data[ddrPortNetworkRx][22:0]};
end
//endgenerate
assign m_axis_mem_write_cmd[ddrPortNetworkTx].address = {32'h0000_0000, axis_write_cmd_data[ddrPortNetworkTx][63:32]};
assign m_axis_mem_write_cmd[ddrPortNetworkTx].length = {9'h00, axis_write_cmd_data[ddrPortNetworkTx][22:0]};
assign m_axis_mem_read_cmd[ddrPortNetworkTx].address = {32'h0000_0000, axis_read_cmd_data[ddrPortNetworkTx][63:32]};
......@@ -170,6 +156,8 @@ assign m_axis_mem_read_cmd[ddrPortNetworkTx].length = {9'h00, axis_read_cmd_data
//TOE Module with RX_DDR_BYPASS disabled
if (RX_DDR_BYPASS_EN == 0) begin
toe_ip toe_inst (
// Data output
.m_axis_tcp_data_TVALID(m_axis_tx_data.valid),
......@@ -183,7 +171,7 @@ toe_ip toe_inst (
.s_axis_tcp_data_TDATA(s_axis_rx_data.data),
.s_axis_tcp_data_TKEEP(s_axis_rx_data.keep),
.s_axis_tcp_data_TLAST(s_axis_rx_data.last),
`ifndef RX_DDR_BYPASS
// rx read commands
.m_axis_rxread_cmd_V_TVALID(m_axis_mem_read_cmd[ddrPortNetworkRx].valid),
.m_axis_rxread_cmd_V_TREADY(m_axis_mem_read_cmd[ddrPortNetworkRx].ready),
......@@ -208,7 +196,122 @@ toe_ip toe_inst (
.m_axis_rxwrite_data_TDATA(axis_rxwrite_data.data),
.m_axis_rxwrite_data_TKEEP(axis_rxwrite_data.keep),
.m_axis_rxwrite_data_TLAST(axis_rxwrite_data.last),
`else
// tx read commands
.m_axis_txread_cmd_V_TVALID(m_axis_mem_read_cmd[ddrPortNetworkTx].valid),
.m_axis_txread_cmd_V_TREADY(m_axis_mem_read_cmd[ddrPortNetworkTx].ready),
.m_axis_txread_cmd_V_TDATA(axis_read_cmd_data[ddrPortNetworkTx]),
//tx write commands
.m_axis_txwrite_cmd_V_TVALID(m_axis_mem_write_cmd[ddrPortNetworkTx].valid),
.m_axis_txwrite_cmd_V_TREADY(m_axis_mem_write_cmd[ddrPortNetworkTx].ready),
.m_axis_txwrite_cmd_V_TDATA(axis_write_cmd_data[ddrPortNetworkTx]),
// tx write status
.s_axis_txwrite_sts_V_TVALID(s_axis_mem_write_sts[ddrPortNetworkTx].valid),
.s_axis_txwrite_sts_V_TREADY(s_axis_mem_write_sts[ddrPortNetworkTx].ready),
.s_axis_txwrite_sts_V_TDATA(s_axis_mem_write_sts[ddrPortNetworkTx].data),
// tx read path
.s_axis_txread_data_TVALID(axis_txread_data.valid),
.s_axis_txread_data_TREADY(axis_txread_data.ready),
.s_axis_txread_data_TDATA(axis_txread_data.data),
.s_axis_txread_data_TKEEP(axis_txread_data.keep),
.s_axis_txread_data_TLAST(axis_txread_data.last),
// tx write path
.m_axis_txwrite_data_TVALID(axis_txwrite_data.valid),
.m_axis_txwrite_data_TREADY(axis_txwrite_data.ready),
.m_axis_txwrite_data_TDATA(axis_txwrite_data.data),
.m_axis_txwrite_data_TKEEP(axis_txwrite_data.keep),
.m_axis_txwrite_data_TLAST(axis_txwrite_data.last),
/// SmartCAM I/F ///
.m_axis_session_upd_req_V_TVALID(axis_ht_upd_req.valid),
.m_axis_session_upd_req_V_TREADY(axis_ht_upd_req.ready),
.m_axis_session_upd_req_V_TDATA(axis_ht_upd_req.data),
.s_axis_session_upd_rsp_V_TVALID(axis_ht_upd_rsp.valid),
.s_axis_session_upd_rsp_V_TREADY(axis_ht_upd_rsp.ready),
.s_axis_session_upd_rsp_V_TDATA(axis_ht_upd_rsp.data),
.m_axis_session_lup_req_V_TVALID(axis_ht_lup_req.valid),
.m_axis_session_lup_req_V_TREADY(axis_ht_lup_req.ready),
.m_axis_session_lup_req_V_TDATA(axis_ht_lup_req.data),
.s_axis_session_lup_rsp_V_TVALID(axis_ht_lup_rsp.valid),
.s_axis_session_lup_rsp_V_TREADY(axis_ht_lup_rsp.ready),
.s_axis_session_lup_rsp_V_TDATA(axis_ht_lup_rsp.data),
/* Application Interface */
// listen&close port
.s_axis_listen_port_req_V_V_TVALID(axis_listen_port.valid),
.s_axis_listen_port_req_V_V_TREADY(axis_listen_port.ready),
.s_axis_listen_port_req_V_V_TDATA(axis_listen_port.data),
.m_axis_listen_port_rsp_V_TVALID(axis_listen_port_status.valid),
.m_axis_listen_port_rsp_V_TREADY(axis_listen_port_status.ready),
.m_axis_listen_port_rsp_V_TDATA(axis_listen_port_status.data),
// notification & read request
.m_axis_notification_V_TVALID(axis_notifications.valid),
.m_axis_notification_V_TREADY(axis_notifications.ready),
.m_axis_notification_V_TDATA(axis_notifications.data),
.s_axis_rx_data_req_V_TVALID(axis_read_package.valid),
.s_axis_rx_data_req_V_TREADY(axis_read_package.ready),
.s_axis_rx_data_req_V_TDATA(axis_read_package.data),
// open&close connection
.s_axis_open_conn_req_V_TVALID(axis_open_connection.valid),
.s_axis_open_conn_req_V_TREADY(axis_open_connection.ready),
.s_axis_open_conn_req_V_TDATA(axis_open_connection.data),
.m_axis_open_conn_rsp_V_TVALID(axis_open_status.valid),
.m_axis_open_conn_rsp_V_TREADY(axis_open_status.ready),
.m_axis_open_conn_rsp_V_TDATA(axis_open_status.data),
.s_axis_close_conn_req_V_V_TVALID(axis_close_connection.valid),
.s_axis_close_conn_req_V_V_TREADY(axis_close_connection.ready),
.s_axis_close_conn_req_V_V_TDATA(axis_close_connection.data),
// rx data
.m_axis_rx_data_rsp_metadata_V_V_TVALID(axis_rx_metadata.valid),
.m_axis_rx_data_rsp_metadata_V_V_TREADY(axis_rx_metadata.ready),
.m_axis_rx_data_rsp_metadata_V_V_TDATA(axis_rx_metadata.data),
.m_axis_rx_data_rsp_TVALID(m_axis_rx_data.valid),
.m_axis_rx_data_rsp_TREADY(m_axis_rx_data.ready),
.m_axis_rx_data_rsp_TDATA(m_axis_rx_data.data),
.m_axis_rx_data_rsp_TKEEP(m_axis_rx_data.keep),
.m_axis_rx_data_rsp_TLAST(m_axis_rx_data.last),
// tx data
.s_axis_tx_data_req_metadata_V_TVALID(axis_tx_metadata.valid),
.s_axis_tx_data_req_metadata_V_TREADY(axis_tx_metadata.ready),
.s_axis_tx_data_req_metadata_V_TDATA(axis_tx_metadata.data),
.s_axis_tx_data_req_TVALID(s_axis_tx_data.valid),
.s_axis_tx_data_req_TREADY(s_axis_tx_data.ready),
.s_axis_tx_data_req_TDATA(s_axis_tx_data.data),
.s_axis_tx_data_req_TKEEP(s_axis_tx_data.keep),
.s_axis_tx_data_req_TLAST(s_axis_tx_data.last),
.m_axis_tx_data_rsp_V_TVALID(m_axis_tx_status.valid),
.m_axis_tx_data_rsp_V_TREADY(m_axis_tx_status.ready),
.m_axis_tx_data_rsp_V_TDATA(m_axis_tx_status.data),
.myIpAddress_V(local_ip_address),
.regSessionCount_V(session_count_data),
.regSessionCount_V_ap_vld(session_count_valid),
.ap_clk(net_clk), // input aclk
.ap_rst_n(net_aresetn) // input aresetn
);
end
else begin //RX_DDR_BYPASS_EN == 1
//TOE Module with RX_DDR_BYPASS enabled
toe_ip toe_inst (
// Data output
.m_axis_tcp_data_TVALID(m_axis_tx_data.valid),
.m_axis_tcp_data_TREADY(m_axis_tx_data.ready),
.m_axis_tcp_data_TDATA(m_axis_tx_data.data), // output [63 : 0] AXI_M_Stream_TDATA
.m_axis_tcp_data_TKEEP(m_axis_tx_data.keep),
.m_axis_tcp_data_TLAST(m_axis_tx_data.last),
// Data input
.s_axis_tcp_data_TVALID(s_axis_rx_data.valid),
.s_axis_tcp_data_TREADY(s_axis_rx_data.ready),
.s_axis_tcp_data_TDATA(s_axis_rx_data.data),
.s_axis_tcp_data_TKEEP(s_axis_rx_data.keep),
.s_axis_tcp_data_TLAST(s_axis_rx_data.last),
// rx buffer read path
.s_axis_rxread_data_TVALID(axis_rxbuffer2app.valid),
.s_axis_rxread_data_TREADY(axis_rxbuffer2app.ready),
......@@ -221,7 +324,7 @@ toe_ip toe_inst (
.m_axis_rxwrite_data_TDATA(axis_tcp2rxbuffer.data),
.m_axis_rxwrite_data_TKEEP(axis_tcp2rxbuffer.keep),
.m_axis_rxwrite_data_TLAST(axis_tcp2rxbuffer.last),
`endif
// tx read commands
.m_axis_txread_cmd_V_TVALID(m_axis_mem_read_cmd[ddrPortNetworkTx].valid),
.m_axis_txread_cmd_V_TREADY(m_axis_mem_read_cmd[ddrPortNetworkTx].ready),
......@@ -316,16 +419,18 @@ toe_ip toe_inst (
.myIpAddress_V(local_ip_address),
.regSessionCount_V(session_count_data),
.regSessionCount_V_ap_vld(session_count_valid),
`ifdef RX_DDR_BYPASS
//for external RX Buffer
.axis_data_count_V(rx_buffer_data_count_reg2),
.axis_max_data_count_V(16'd1024),
`endif
.ap_clk(net_clk), // input aclk
.ap_rst_n(net_aresetn) // input aresetn
);
end //RX_DDR_BYPASS_EN
`ifdef RX_DDR_BYPASS
if (RX_DDR_BYPASS_EN == 1) begin
//RX BUFFER FIFO
if (WIDTH==64) begin
axis_data_fifo_64_d1024 rx_buffer_fifo (
......@@ -405,7 +510,7 @@ always @(posedge net_clk) begin
rx_buffer_data_count_reg <= rx_buffer_data_count[15:0];
rx_buffer_data_count_reg2 <= rx_buffer_data_count_reg;
end
`endif
end //RX_DDR_BYPASS_EN
/*SmartCamCtl SmartCamCtl_inst
(
......@@ -458,7 +563,7 @@ hash_table_ip hash_table_inst (
if (WIDTH==64) begin
//TCP Data Path
`ifndef RX_DDR_BYPASS
if (RX_DDR_BYPASS_EN == 0) begin
axis_512_to_64_converter tcp_rxread_data_converter (
.aclk(net_clk), // input wire aclk
.aresetn(net_aresetn), // input wire aresetn
......@@ -490,7 +595,7 @@ axis_64_to_512_converter tcp_rxwrite_data_converter (
.m_axis_tlast(m_axis_mem_write_data[ddrPortNetworkRx].last), // output wire m_axis_tlast
.m_axis_tdest() // output wire m_axis_tlast
);
`endif
end
axis_512_to_64_converter tcp_txread_data_converter (
.aclk(net_clk), // input wire aclk
.aresetn(net_aresetn), // input wire aresetn
......@@ -525,7 +630,7 @@ axis_64_to_512_converter tcp_txwrite_data_converter (
end
if (WIDTH==128) begin
//TCP Data Path
`ifndef RX_DDR_BYPASS
if (RX_DDR_BYPASS_EN == 0) begin
axis_512_to_128_converter tcp_rxread_data_converter (
.aclk(net_clk), // input wire aclk
.aresetn(net_aresetn), // input wire aresetn
......@@ -557,7 +662,7 @@ axis_128_to_512_converter tcp_rxwrite_data_converter (
.m_axis_tlast(m_axis_mem_write_data[ddrPortNetworkRx].last), // output wire m_axis_tlast
.m_axis_tdest() // output wire m_axis_tlast
);
`endif
end
axis_512_to_128_converter tcp_txread_data_converter (
.aclk(net_clk), // input wire aclk
.aresetn(net_aresetn), // input wire aresetn
......@@ -592,7 +697,7 @@ axis_128_to_512_converter tcp_txwrite_data_converter (
end
if (WIDTH==256) begin
//TCP Data Path
`ifndef RX_DDR_BYPASS
if (RX_DDR_BYPASS_EN == 0) begin
axis_512_to_256_converter tcp_rxread_data_converter (
.aclk(net_clk), // input wire aclk
.aresetn(net_aresetn), // input wire aresetn
......@@ -624,7 +729,7 @@ axis_256_to_512_converter tcp_rxwrite_data_converter (
.m_axis_tlast(m_axis_mem_write_data[ddrPortNetworkRx].last), // output wire m_axis_tlast
.m_axis_tdest() // output wire m_axis_tlast
);
`endif
end
axis_512_to_256_converter tcp_txread_data_converter (
.aclk(net_clk), // input wire aclk
.aresetn(net_aresetn), // input wire aresetn
......
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