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paulrr2
fpga-network-stack
Commits
62f62455
Commit
62f62455
authored
5 years ago
by
David Sidler
Browse files
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Plain Diff
moved data conversion of RoCE to avoid critical warnings when roce stack is disabled
parent
6ddc53a6
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Changes
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2 changed files
hdl/common/network_stack.sv
+5
-82
5 additions, 82 deletions
hdl/common/network_stack.sv
hdl/common/roce_stack.sv
+96
-17
96 additions, 17 deletions
hdl/common/roce_stack.sv
with
101 additions
and
99 deletions
hdl/common/network_stack.sv
+
5
−
82
View file @
62f62455
...
...
@@ -392,7 +392,8 @@ assign axis_ipv6_to_intercon.last = 1'b0;
roce_stack
#(
.
ROCE_EN
(
ROCE_EN
)
.
ROCE_EN
(
ROCE_EN
),
.
WIDTH
(
WIDTH
)
)
rocev2_stack_inst
(
.
net_clk
(
net_clk
),
// input aclk
.
net_aresetn
(
net_aresetn
),
// input aresetn
...
...
@@ -407,7 +408,7 @@ roce_stack #(
//TX
.
s_axis_tx_meta
(
axis_tx_metadata
),
.
s_axis_tx_data
(
axis_tx_data
),
.
s_axis_tx_data
(
s_
axis_
roce_role_
tx_data
),
`ifdef
IP_VERSION4
// IPv4
...
...
@@ -425,9 +426,9 @@ roce_stack #(
.
m_axis_mem_read_cmd
(
m_axis_roce_read_cmd
),
// Memory Write
.
m_axis_mem_write_data
(
axis_roce_write_data
),
.
m_axis_mem_write_data
(
m_
axis_roce_write_data
),
// Memory Read
.
s_axis_mem_read_data
(
axis_roce_read_data
),
.
s_axis_mem_read_data
(
s_
axis_roce_read_data
),
// Memory Write Status
//.s_axis_mem_write_status_TVALID(s_axis_rxwrite_sts_TVALID),
//.s_axis_mem_write_status_TREADY(s_axis_rxwrite_sts_TREADY),
...
...
@@ -1512,84 +1513,6 @@ axis_interconnect_merger_160 tx_metadata_merger (
);
/*
* Width alignment
*/
axi_stream
#(.
WIDTH
(
WIDTH
)
)
axis_roce_read_data
();
axi_stream
#(.
WIDTH
(
WIDTH
)
)
axis_roce_write_data
();
axi_stream
#(.
WIDTH
(
WIDTH
)
)
axis_tx_data
();
generate
if
(
WIDTH
==
64
)
begin
//TODO move
//RoCE Data Path
axis_512_to_64_converter
roce_read_data_converter
(
.
aclk
(
net_clk
),
// input wire aclk
.
aresetn
(
net_aresetn
),
// input wire aresetn
.
s_axis_tvalid
(
s_axis_roce_read_data
.
valid
),
// input wire s_axis_tvalid
.
s_axis_tready
(
s_axis_roce_read_data
.
ready
),
// output wire s_axis_tready
.
s_axis_tdata
(
s_axis_roce_read_data
.
data
),
// input wire [63 : 0] s_axis_tdata
.
s_axis_tkeep
(
s_axis_roce_read_data
.
keep
),
// input wire [7 : 0] s_axis_tkeep
.
s_axis_tlast
(
s_axis_roce_read_data
.
last
),
// input wire s_axis_tlast
.
m_axis_tvalid
(
axis_roce_read_data
.
valid
),
// output wire m_axis_tvalid
.
m_axis_tready
(
axis_roce_read_data
.
ready
),
// input wire m_axis_tready
.
m_axis_tdata
(
axis_roce_read_data
.
data
),
// output wire [511 : 0] m_axis_tdata
.
m_axis_tkeep
(
axis_roce_read_data
.
keep
),
// output wire [63 : 0] m_axis_tkeep
.
m_axis_tlast
(
axis_roce_read_data
.
last
)
// output wire m_axis_tlast
);
axis_512_to_64_converter
roce_tx_data_converter
(
.
aclk
(
net_clk
),
// input wire aclk
.
aresetn
(
net_aresetn
),
// input wire aresetn
.
s_axis_tvalid
(
s_axis_roce_role_tx_data
.
valid
),
// input wire s_axis_tvalid
.
s_axis_tready
(
s_axis_roce_role_tx_data
.
ready
),
// output wire s_axis_tready
.
s_axis_tdata
(
s_axis_roce_role_tx_data
.
data
),
// input wire [63 : 0] s_axis_tdata
.
s_axis_tkeep
(
s_axis_roce_role_tx_data
.
keep
),
// input wire [7 : 0] s_axis_tkeep
.
s_axis_tlast
(
s_axis_roce_role_tx_data
.
last
),
// input wire s_axis_tlast
.
m_axis_tvalid
(
axis_tx_data
.
valid
),
// output wire m_axis_tvalid
.
m_axis_tready
(
axis_tx_data
.
ready
),
// input wire m_axis_tready
.
m_axis_tdata
(
axis_tx_data
.
data
),
// output wire [511 : 0] m_axis_tdata
.
m_axis_tkeep
(
axis_tx_data
.
keep
),
// output wire [63 : 0] m_axis_tkeep
.
m_axis_tlast
(
axis_tx_data
.
last
)
// output wire m_axis_tlast
);
axis_64_to_512_converter
roce_write_data_converter
(
.
aclk
(
net_clk
),
// input wire aclk
.
aresetn
(
net_aresetn
),
// input wire aresetn
.
s_axis_tvalid
(
axis_roce_write_data
.
valid
),
// input wire s_axis_tvalid
.
s_axis_tready
(
axis_roce_write_data
.
ready
),
// output wire s_axis_tready
.
s_axis_tdata
(
axis_roce_write_data
.
data
),
// input wire [63 : 0] s_axis_tdata
.
s_axis_tkeep
(
axis_roce_write_data
.
keep
),
// input wire [7 : 0] s_axis_tkeep
.
s_axis_tlast
(
axis_roce_write_data
.
last
),
// input wire s_axis_tlast
.
s_axis_tdest
(
axis_roce_write_data
.
dest
),
// input wire s_axis_tlast
.
m_axis_tvalid
(
m_axis_roce_write_data
.
valid
),
// output wire m_axis_tvalid
.
m_axis_tready
(
m_axis_roce_write_data
.
ready
),
// input wire m_axis_tready
.
m_axis_tdata
(
m_axis_roce_write_data
.
data
),
// output wire [511 : 0] m_axis_tdata
.
m_axis_tkeep
(
m_axis_roce_write_data
.
keep
),
// output wire [63 : 0] m_axis_tkeep
.
m_axis_tlast
(
m_axis_roce_write_data
.
last
),
// output wire m_axis_tlast
.
m_axis_tdest
(
m_axis_roce_write_data
.
dest
)
// output wire m_axis_tlast
);
end
if
(
WIDTH
==
512
)
begin
//RoCE Data Path
assign
axis_roce_read_data
.
valid
=
s_axis_roce_read_data
.
valid
;
assign
s_axis_roce_read_data
.
ready
=
axis_roce_read_data
.
ready
;
assign
axis_roce_read_data
.
data
=
s_axis_roce_read_data
.
data
;
assign
axis_roce_read_data
.
keep
=
s_axis_roce_read_data
.
keep
;
assign
axis_roce_read_data
.
last
=
s_axis_roce_read_data
.
last
;
assign
axis_tx_data
.
valid
=
s_axis_roce_role_tx_data
.
valid
;
assign
s_axis_roce_role_tx_data
.
ready
=
axis_tx_data
.
ready
;
assign
axis_tx_data
.
data
=
s_axis_roce_role_tx_data
.
data
;
assign
axis_tx_data
.
keep
=
s_axis_roce_role_tx_data
.
keep
;
assign
axis_tx_data
.
last
=
s_axis_roce_role_tx_data
.
last
;
assign
m_axis_roce_write_data
.
valid
=
axis_roce_write_data
.
valid
;
assign
axis_roce_write_data
.
ready
=
m_axis_roce_write_data
.
ready
;
assign
m_axis_roce_write_data
.
data
=
axis_roce_write_data
.
data
;
assign
m_axis_roce_write_data
.
keep
=
axis_roce_write_data
.
keep
;
assign
m_axis_roce_write_data
.
last
=
axis_roce_write_data
.
last
;
end
endgenerate
/*
* Statistics
*/
...
...
This diff is collapsed.
Click to expand it.
hdl/common/roce_stack.sv
+
96
−
17
View file @
62f62455
...
...
@@ -32,7 +32,8 @@
//`define POINTER_CHASING
module
roce_stack
#(
parameter
ROCE_EN
=
1
parameter
ROCE_EN
=
1
,
parameter
WIDTH
=
64
)(
input
wire
net_clk
,
input
wire
net_aresetn
,
...
...
@@ -103,11 +104,11 @@ rocev2_ip rocev2_inst(
.
s_axis_tx_meta_V_TVALID
(
s_axis_tx_meta
.
valid
),
.
s_axis_tx_meta_V_TREADY
(
s_axis_tx_meta
.
ready
),
.
s_axis_tx_meta_V_TDATA
(
s_axis_tx_meta
.
data
),
.
s_axis_tx_data_TVALID
(
s_
axis_tx_data
.
valid
),
.
s_axis_tx_data_TREADY
(
s_
axis_tx_data
.
ready
),
.
s_axis_tx_data_TDATA
(
s_
axis_tx_data
.
data
),
.
s_axis_tx_data_TKEEP
(
s_
axis_tx_data
.
keep
),
.
s_axis_tx_data_TLAST
(
s_
axis_tx_data
.
last
),
.
s_axis_tx_data_TVALID
(
axis_tx_data
.
valid
),
.
s_axis_tx_data_TREADY
(
axis_tx_data
.
ready
),
.
s_axis_tx_data_TDATA
(
axis_tx_data
.
data
),
.
s_axis_tx_data_TKEEP
(
axis_tx_data
.
keep
),
.
s_axis_tx_data_TLAST
(
axis_tx_data
.
last
),
// IPv4
.
m_axis_tx_data_TVALID
(
m_axis_tx_data
.
valid
),
...
...
@@ -127,18 +128,18 @@ rocev2_ip rocev2_inst(
.
m_axis_mem_read_cmd_TDATA
(
m_axis_mem_read_cmd
.
data
),
.
m_axis_mem_read_cmd_TDEST
(
m_axis_mem_read_cmd
.
dest
),
// Memory Write
.
m_axis_mem_write_data_TVALID
(
m_
axis_mem_write_data
.
valid
),
.
m_axis_mem_write_data_TREADY
(
m_
axis_mem_write_data
.
ready
),
.
m_axis_mem_write_data_TDATA
(
m_
axis_mem_write_data
.
data
),
.
m_axis_mem_write_data_TKEEP
(
m_
axis_mem_write_data
.
keep
),
.
m_axis_mem_write_data_TLAST
(
m_
axis_mem_write_data
.
last
),
.
m_axis_mem_write_data_TDEST
(
m_
axis_mem_write_data
.
dest
),
.
m_axis_mem_write_data_TVALID
(
axis_mem_write_data
.
valid
),
.
m_axis_mem_write_data_TREADY
(
axis_mem_write_data
.
ready
),
.
m_axis_mem_write_data_TDATA
(
axis_mem_write_data
.
data
),
.
m_axis_mem_write_data_TKEEP
(
axis_mem_write_data
.
keep
),
.
m_axis_mem_write_data_TLAST
(
axis_mem_write_data
.
last
),
.
m_axis_mem_write_data_TDEST
(
axis_mem_write_data
.
dest
),
// Memory Read
.
s_axis_mem_read_data_TVALID
(
s_
axis_mem_read_data
.
valid
),
.
s_axis_mem_read_data_TREADY
(
s_
axis_mem_read_data
.
ready
),
.
s_axis_mem_read_data_TDATA
(
s_
axis_mem_read_data
.
data
),
.
s_axis_mem_read_data_TKEEP
(
s_
axis_mem_read_data
.
keep
),
.
s_axis_mem_read_data_TLAST
(
s_
axis_mem_read_data
.
last
),
.
s_axis_mem_read_data_TVALID
(
axis_mem_read_data
.
valid
),
.
s_axis_mem_read_data_TREADY
(
axis_mem_read_data
.
ready
),
.
s_axis_mem_read_data_TDATA
(
axis_mem_read_data
.
data
),
.
s_axis_mem_read_data_TKEEP
(
axis_mem_read_data
.
keep
),
.
s_axis_mem_read_data_TLAST
(
axis_mem_read_data
.
last
),
// Memory Write Status
//.s_axis_mem_write_status_TVALID(s_axis_rxwrite_sts_TVALID),
//.s_axis_mem_write_status_TREADY(s_axis_rxwrite_sts_TREADY),
...
...
@@ -169,6 +170,84 @@ rocev2_ip rocev2_inst(
.
regInvalidPsnDropCount_V_ap_vld
(
psn_drop_pkg_count_valid
)
);
/*
* Width alignment
*/
axi_stream
#(.
WIDTH
(
WIDTH
)
)
axis_mem_read_data
();
axi_stream
#(.
WIDTH
(
WIDTH
)
)
axis_mem_write_data
();
axi_stream
#(.
WIDTH
(
WIDTH
)
)
axis_tx_data
();
//generate
if
(
WIDTH
==
64
)
begin
//RoCE Data Path
axis_512_to_64_converter
roce_read_data_converter
(
.
aclk
(
net_clk
),
// input wire aclk
.
aresetn
(
net_aresetn
),
// input wire aresetn
.
s_axis_tvalid
(
s_axis_mem_read_data
.
valid
),
// input wire s_axis_tvalid
.
s_axis_tready
(
s_axis_mem_read_data
.
ready
),
// output wire s_axis_tready
.
s_axis_tdata
(
s_axis_mem_read_data
.
data
),
// input wire [63 : 0] s_axis_tdata
.
s_axis_tkeep
(
s_axis_mem_read_data
.
keep
),
// input wire [7 : 0] s_axis_tkeep
.
s_axis_tlast
(
s_axis_mem_read_data
.
last
),
// input wire s_axis_tlast
.
m_axis_tvalid
(
axis_mem_read_data
.
valid
),
// output wire m_axis_tvalid
.
m_axis_tready
(
axis_mem_read_data
.
ready
),
// input wire m_axis_tready
.
m_axis_tdata
(
axis_mem_read_data
.
data
),
// output wire [511 : 0] m_axis_tdata
.
m_axis_tkeep
(
axis_mem_read_data
.
keep
),
// output wire [63 : 0] m_axis_tkeep
.
m_axis_tlast
(
axis_mem_read_data
.
last
)
// output wire m_axis_tlast
);
axis_512_to_64_converter
roce_tx_data_converter
(
.
aclk
(
net_clk
),
// input wire aclk
.
aresetn
(
net_aresetn
),
// input wire aresetn
.
s_axis_tvalid
(
s_axis_roce_role_tx_data
.
valid
),
// input wire s_axis_tvalid
.
s_axis_tready
(
s_axis_roce_role_tx_data
.
ready
),
// output wire s_axis_tready
.
s_axis_tdata
(
s_axis_roce_role_tx_data
.
data
),
// input wire [63 : 0] s_axis_tdata
.
s_axis_tkeep
(
s_axis_roce_role_tx_data
.
keep
),
// input wire [7 : 0] s_axis_tkeep
.
s_axis_tlast
(
s_axis_tx_data
.
last
),
// input wire s_axis_tlast
.
m_axis_tvalid
(
axis_tx_data
.
valid
),
// output wire m_axis_tvalid
.
m_axis_tready
(
axis_tx_data
.
ready
),
// input wire m_axis_tready
.
m_axis_tdata
(
axis_tx_data
.
data
),
// output wire [511 : 0] m_axis_tdata
.
m_axis_tkeep
(
axis_tx_data
.
keep
),
// output wire [63 : 0] m_axis_tkeep
.
m_axis_tlast
(
axis_tx_data
.
last
)
// output wire m_axis_tlast
);
axis_64_to_512_converter
roce_write_data_converter
(
.
aclk
(
net_clk
),
// input wire aclk
.
aresetn
(
net_aresetn
),
// input wire aresetn
.
s_axis_tvalid
(
axis_mem_write_data
.
valid
),
// input wire s_axis_tvalid
.
s_axis_tready
(
axis_mem_write_data
.
ready
),
// output wire s_axis_tready
.
s_axis_tdata
(
axis_mem_write_data
.
data
),
// input wire [63 : 0] s_axis_tdata
.
s_axis_tkeep
(
axis_mem_write_data
.
keep
),
// input wire [7 : 0] s_axis_tkeep
.
s_axis_tlast
(
axis_mem_write_data
.
last
),
// input wire s_axis_tlast
.
s_axis_tdest
(
axis_mem_write_data
.
dest
),
// input wire s_axis_tlast
.
m_axis_tvalid
(
m_axis_mem_write_data
.
valid
),
// output wire m_axis_tvalid
.
m_axis_tready
(
m_axis_mem_write_data
.
ready
),
// input wire m_axis_tready
.
m_axis_tdata
(
m_axis_mem_write_data
.
data
),
// output wire [511 : 0] m_axis_tdata
.
m_axis_tkeep
(
m_axis_mem_write_data
.
keep
),
// output wire [63 : 0] m_axis_tkeep
.
m_axis_tlast
(
m_axis_mem_write_data
.
last
),
// output wire m_axis_tlast
.
m_axis_tdest
(
m_axis_mem_write_data
.
dest
)
// output wire m_axis_tlast
);
end
if
(
WIDTH
==
512
)
begin
//RoCE Data Path
assign
axis_mem_read_data
.
valid
=
s_axis_mem_read_data
.
valid
;
assign
s_axis_mem_read_data
.
ready
=
axis_mem_read_data
.
ready
;
assign
axis_mem_read_data
.
data
=
s_axis_mem_read_data
.
data
;
assign
axis_mem_read_data
.
keep
=
s_axis_mem_read_data
.
keep
;
assign
axis_mem_read_data
.
last
=
s_axis_mem_read_data
.
last
;
assign
axis_tx_data
.
valid
=
s_axis_tx_data
.
valid
;
assign
s_axis_tx_data
.
ready
=
axis_tx_data
.
ready
;
assign
axis_tx_data
.
data
=
s_axis_tx_data
.
data
;
assign
axis_tx_data
.
keep
=
s_axis_tx_data
.
keep
;
assign
axis_tx_data
.
last
=
s_axis_tx_data
.
last
;
assign
m_axis_mem_write_data
.
valid
=
axis_mem_write_data
.
valid
;
assign
axis_mem_write_data
.
ready
=
m_axis_mem_write_data
.
ready
;
assign
m_axis_mem_write_data
.
data
=
axis_mem_write_data
.
data
;
assign
m_axis_mem_write_data
.
keep
=
axis_mem_write_data
.
keep
;
assign
m_axis_mem_write_data
.
last
=
axis_mem_write_data
.
last
;
end
//endgenerate
assign
m_axis_rx_pcmeta
.
valid
=
1'b0
;
assign
m_axis_rx_pcmeta
.
data
=
0
;
assign
s_axis_tx_pcmeta
.
ready
=
1'b1
;
...
...
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