From 9b3dea5585d4cbd63128d9ac367d20996e9aaefa Mon Sep 17 00:00:00 2001
From: Fang Lu <cc2lufang@gmail.com>
Date: Thu, 30 Nov 2017 18:16:07 -0600
Subject: [PATCH] gl - connect to Avalon

---
 README.md                           |   2 +-
 gl/oto_gl_hw.tcl                    |   7 +-
 osu_fpga_toplevel.qsf               | 403 ++++++++++++----------------
 osu_fpga_toplevel.sv                | 149 ++++------
 otogame.qsys                        | 151 ++++++++---
 software/.gitignore                 |   3 +
 software/osu_main/Makefile          |   6 +-
 software/osu_main/src/gl/gl.c       |  31 +++
 software/osu_main/src/gl/gl.h       |  14 +
 software/osu_main/src/gl/painters.c |  20 ++
 software/osu_main/src/gl/painters.h |  10 +
 software/osu_main/src/gl/regs.c     |   4 +
 software/osu_main/src/gl/regs.h     |  27 ++
 software/osu_main/src/gl/util.c     |  16 ++
 software/osu_main/src/gl/util.h     |  10 +
 software/osu_main/src/main.c        |  15 ++
 software/usb/Makefile               |   2 +-
 17 files changed, 490 insertions(+), 380 deletions(-)
 create mode 100644 software/osu_main/src/gl/gl.c
 create mode 100644 software/osu_main/src/gl/gl.h
 create mode 100644 software/osu_main/src/gl/painters.c
 create mode 100644 software/osu_main/src/gl/painters.h
 create mode 100644 software/osu_main/src/gl/regs.c
 create mode 100644 software/osu_main/src/gl/regs.h
 create mode 100644 software/osu_main/src/gl/util.c
 create mode 100644 software/osu_main/src/gl/util.h

diff --git a/README.md b/README.md
index 0804338..79359f3 100644
--- a/README.md
+++ b/README.md
@@ -36,7 +36,7 @@ Features
 **Graphics**
 
 * [x] **VGA output driver**
-* [ ] **Graphics service & task distributor**
+* [x] **Graphics service & task distributor**
 * [ ] **Bitmap renderer**
 	* [ ] **Bitmap resizable copy**
 	* [ ] **Layer blending**
diff --git a/gl/oto_gl_hw.tcl b/gl/oto_gl_hw.tcl
index 12b5f04..f2c18f0 100644
--- a/gl/oto_gl_hw.tcl
+++ b/gl/oto_gl_hw.tcl
@@ -1,11 +1,11 @@
 # TCL File Generated by Component Editor 17.1
-# Mon Nov 27 00:41:58 CST 2017
+# Wed Nov 29 09:34:49 CST 2017
 # DO NOT MODIFY
 
 
 # 
 # oto_gl "otofpga Graphics Library" v1.0
-#  2017.11.27.00:41:58
+#  2017.11.29.09:34:49
 # 
 # 
 
@@ -189,8 +189,7 @@ set_interface_property slave_palette linewrapBursts false
 set_interface_property slave_palette maximumPendingReadTransactions 0
 set_interface_property slave_palette maximumPendingWriteTransactions 0
 set_interface_property slave_palette readLatency 0
-set_interface_property slave_palette readWaitStates 0
-set_interface_property slave_palette readWaitTime 0
+set_interface_property slave_palette readWaitTime 1
 set_interface_property slave_palette setupTime 0
 set_interface_property slave_palette timingUnits Cycles
 set_interface_property slave_palette writeWaitTime 0
diff --git a/osu_fpga_toplevel.qsf b/osu_fpga_toplevel.qsf
index 6ad0c49..9398ccb 100644
--- a/osu_fpga_toplevel.qsf
+++ b/osu_fpga_toplevel.qsf
@@ -1130,213 +1130,12 @@ set_global_assignment -name EDA_TEST_BENCH_FILE test.sv -section_id test
 set_global_assignment -name ENABLE_SIGNALTAP ON
 set_global_assignment -name USE_SIGNALTAP_FILE stp1.stp
 set_global_assignment -name OPTIMIZATION_MODE BALANCED
-set_global_assignment -name SYSTEMVERILOG_FILE gl/painters/gl_painter_rect.sv
-set_global_assignment -name SYSTEMVERILOG_FILE gl/gl_vga.sv
-set_global_assignment -name SYSTEMVERILOG_FILE gl/gl_sram_s.sv
-set_global_assignment -name SYSTEMVERILOG_FILE gl/gl_redraw_cache.sv
-set_global_assignment -name SYSTEMVERILOG_FILE gl/gl_palette.sv
-set_global_assignment -name SYSTEMVERILOG_FILE gl/gl_mgr.sv
-set_global_assignment -name SYSTEMVERILOG_FILE gl/gl_frame_buffer.sv
-set_global_assignment -name SYSTEMVERILOG_FILE gl/gl_def_cmd.sv
-set_global_assignment -name SYSTEMVERILOG_FILE gl/gl_avalon_intf.sv
-set_global_assignment -name QIP_FILE otogame/synthesis/otogame.qip
-set_global_assignment -name SYSTEMVERILOG_FILE test.sv
-set_global_assignment -name SYSTEMVERILOG_FILE input/hpi_io_intf.sv
-set_global_assignment -name SDC_FILE timing.sdc
-set_global_assignment -name SYSTEMVERILOG_FILE hexdriver.sv
-set_global_assignment -name SYSTEMVERILOG_FILE osu_fpga_toplevel.sv
 set_global_assignment -name SLD_NODE_CREATOR_ID 110 -section_id auto_signaltap_0
 set_global_assignment -name SLD_NODE_ENTITY_NAME sld_signaltap -section_id auto_signaltap_0
 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_clk -to CLOCK_50 -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[0] -to SRAM_CE_N -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[1] -to SRAM_OE_N -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[2] -to SRAM_WE_N -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[3] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|BUF_ACTIVE" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[4] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|VGA_REQ" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[5] -to "gl_mgr:test|gl_vga:vga|VGA_INTERFRAME" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[0] -to SRAM_ADDR[0] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[1] -to SRAM_ADDR[10] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[2] -to SRAM_ADDR[11] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[3] -to SRAM_ADDR[12] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[4] -to SRAM_ADDR[13] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[5] -to SRAM_ADDR[14] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[6] -to SRAM_ADDR[15] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[7] -to SRAM_ADDR[16] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[8] -to SRAM_ADDR[17] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[9] -to SRAM_ADDR[18] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[10] -to SRAM_ADDR[19] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[11] -to SRAM_ADDR[1] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[12] -to SRAM_ADDR[2] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[13] -to SRAM_ADDR[3] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[14] -to SRAM_ADDR[4] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[15] -to SRAM_ADDR[5] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[16] -to SRAM_ADDR[6] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[17] -to SRAM_ADDR[7] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[18] -to SRAM_ADDR[8] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[19] -to SRAM_ADDR[9] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[20] -to SRAM_CE_N -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[21] -to SRAM_DQ[0] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[22] -to SRAM_DQ[10] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[23] -to SRAM_DQ[11] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[24] -to SRAM_DQ[12] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[25] -to SRAM_DQ[13] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[26] -to SRAM_DQ[14] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[27] -to SRAM_DQ[15] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[28] -to SRAM_DQ[1] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[29] -to SRAM_DQ[2] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[30] -to SRAM_DQ[3] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[31] -to SRAM_DQ[4] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[32] -to SRAM_DQ[5] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[33] -to SRAM_DQ[6] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[34] -to SRAM_DQ[7] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[35] -to SRAM_DQ[8] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[36] -to SRAM_DQ[9] -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[37] -to SRAM_OE_N -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[38] -to SRAM_WE_N -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[39] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|BUF_ACTIVE" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[40] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|PL_ADDR[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[41] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|PL_ADDR[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[42] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|PL_ADDR[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[43] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|PL_ADDR[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[44] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|PL_ADDR[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[45] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|PL_ADDR[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[46] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|PL_ADDR[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[47] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|PL_ADDR[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[48] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_ADDR[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[49] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_ADDR[10]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[50] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_ADDR[11]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[51] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_ADDR[12]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[52] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_ADDR[13]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[53] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_ADDR[14]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[54] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_ADDR[15]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[55] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_ADDR[16]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[56] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_ADDR[17]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[57] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_ADDR[18]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[58] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_ADDR[19]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[59] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_ADDR[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[60] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_ADDR[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[61] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_ADDR[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[62] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_ADDR[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[63] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_ADDR[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[64] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_ADDR[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[65] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_ADDR[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[66] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_ADDR[8]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[67] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_ADDR[9]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[68] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|RC_DATA_OUT" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[69] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|VGA_REQ" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[70] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_addr[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[71] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_addr[10]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[72] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_addr[11]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[73] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_addr[12]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[74] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_addr[13]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[75] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_addr[14]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[76] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_addr[15]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[77] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_addr[16]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[78] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_addr[17]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[79] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_addr[18]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[80] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_addr[19]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[81] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_addr[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[82] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_addr[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[83] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_addr[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[84] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_addr[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[85] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_addr[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[86] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_addr[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[87] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_addr[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[88] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_addr[8]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[89] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_addr[9]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[90] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_data[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[91] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_data[10]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[92] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_data[11]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[93] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_data[12]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[94] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_data[13]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[95] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_data[14]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[96] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_data[15]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[97] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_data[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[98] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_data[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[99] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_data[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[100] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_data[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[101] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_data[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[102] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_data[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[103] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_data[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[104] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_data[8]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[105] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_fb_data[9]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[106] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[107] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[10]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[108] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[11]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[109] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[12]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[110] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[13]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[111] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[14]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[112] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[15]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[113] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[16]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[114] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[17]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[115] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[18]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[116] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[19]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[117] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[118] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[20]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[119] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[21]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[120] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[22]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[121] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[23]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[122] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[123] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[124] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[125] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[126] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[127] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[128] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[8]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[129] -to "gl_mgr:test|gl_frame_buffer:frame_buffer|vga_pl_data[9]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[130] -to "gl_mgr:test|gl_vga:vga|FB_X[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[131] -to "gl_mgr:test|gl_vga:vga|FB_X[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[132] -to "gl_mgr:test|gl_vga:vga|FB_X[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[133] -to "gl_mgr:test|gl_vga:vga|FB_X[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[134] -to "gl_mgr:test|gl_vga:vga|FB_X[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[135] -to "gl_mgr:test|gl_vga:vga|FB_X[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[136] -to "gl_mgr:test|gl_vga:vga|FB_X[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[137] -to "gl_mgr:test|gl_vga:vga|FB_X[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[138] -to "gl_mgr:test|gl_vga:vga|FB_X[8]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[139] -to "gl_mgr:test|gl_vga:vga|FB_X[9]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[140] -to "gl_mgr:test|gl_vga:vga|FB_Y[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[141] -to "gl_mgr:test|gl_vga:vga|FB_Y[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[142] -to "gl_mgr:test|gl_vga:vga|FB_Y[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[143] -to "gl_mgr:test|gl_vga:vga|FB_Y[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[144] -to "gl_mgr:test|gl_vga:vga|FB_Y[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[145] -to "gl_mgr:test|gl_vga:vga|FB_Y[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[146] -to "gl_mgr:test|gl_vga:vga|FB_Y[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[147] -to "gl_mgr:test|gl_vga:vga|FB_Y[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[148] -to "gl_mgr:test|gl_vga:vga|FB_Y[8]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[149] -to "gl_mgr:test|gl_vga:vga|FB_Y[9]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[150] -to "gl_mgr:test|gl_vga:vga|VGA_B[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[151] -to "gl_mgr:test|gl_vga:vga|VGA_B[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[152] -to "gl_mgr:test|gl_vga:vga|VGA_B[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[153] -to "gl_mgr:test|gl_vga:vga|VGA_B[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[154] -to "gl_mgr:test|gl_vga:vga|VGA_B[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[155] -to "gl_mgr:test|gl_vga:vga|VGA_B[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[156] -to "gl_mgr:test|gl_vga:vga|VGA_B[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[157] -to "gl_mgr:test|gl_vga:vga|VGA_B[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[158] -to "gl_mgr:test|gl_vga:vga|VGA_G[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[159] -to "gl_mgr:test|gl_vga:vga|VGA_G[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[160] -to "gl_mgr:test|gl_vga:vga|VGA_G[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[161] -to "gl_mgr:test|gl_vga:vga|VGA_G[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[162] -to "gl_mgr:test|gl_vga:vga|VGA_G[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[163] -to "gl_mgr:test|gl_vga:vga|VGA_G[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[164] -to "gl_mgr:test|gl_vga:vga|VGA_G[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[165] -to "gl_mgr:test|gl_vga:vga|VGA_G[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[166] -to "gl_mgr:test|gl_vga:vga|VGA_INTERFRAME" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[167] -to "gl_mgr:test|gl_vga:vga|VGA_R[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[168] -to "gl_mgr:test|gl_vga:vga|VGA_R[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[169] -to "gl_mgr:test|gl_vga:vga|VGA_R[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[170] -to "gl_mgr:test|gl_vga:vga|VGA_R[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[171] -to "gl_mgr:test|gl_vga:vga|VGA_R[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[172] -to "gl_mgr:test|gl_vga:vga|VGA_R[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[173] -to "gl_mgr:test|gl_vga:vga|VGA_R[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[174] -to "gl_mgr:test|gl_vga:vga|VGA_R[7]" -section_id auto_signaltap_0
 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_RAM_BLOCK_TYPE=AUTO" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_DATA_BITS=175" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_BITS=6" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STORAGE_QUALIFIER_BITS=175" -section_id auto_signaltap_0
 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_INFO=805334528" -section_id auto_signaltap_0
 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_POWER_UP_TRIGGER=0" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK=000000000000000000000000000000000000000000000" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK_LENGTH=45" -section_id auto_signaltap_0
 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STORAGE_QUALIFIER_INVERSION_MASK_LENGTH=0" -section_id auto_signaltap_0
 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SEGMENT_SIZE=8192" -section_id auto_signaltap_0
 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ATTRIBUTE_MEM_MODE=OFF" -section_id auto_signaltap_0
@@ -1346,45 +1145,183 @@ set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_BUFFER_FULL_STOP=
 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_CURRENT_RESOURCE_WIDTH=1" -section_id auto_signaltap_0
 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INCREMENTAL_ROUTING=1" -section_id auto_signaltap_0
 set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[0] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[1] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[11] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[15] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL=1" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SAMPLE_DEPTH=8192" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_IN_ENABLED=0" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_PIPELINE=0" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_RAM_PIPELINE=0" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_COUNTER_PIPELINE=0" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL_PIPELINE=1" -section_id auto_signaltap_0
+set_global_assignment -name QIP_FILE otogame/synthesis/otogame.qip
+set_global_assignment -name SYSTEMVERILOG_FILE test.sv
+set_global_assignment -name SYSTEMVERILOG_FILE input/hpi_io_intf.sv
+set_global_assignment -name SDC_FILE timing.sdc
+set_global_assignment -name SYSTEMVERILOG_FILE hexdriver.sv
+set_global_assignment -name SYSTEMVERILOG_FILE osu_fpga_toplevel.sv
+set_global_assignment -name SIGNALTAP_FILE stp1.stp
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[0] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_CS" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[1] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READ" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[2] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITE" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[0] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_ADDR[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[1] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_ADDR[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[2] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_ADDR[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[3] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_ADDR[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[4] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_CS" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[5] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READ" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[6] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[7] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[10]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[8] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[11]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[9] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[12]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[10] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[13]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[11] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[14]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[12] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[15]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[13] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[16]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[14] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[17]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[15] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[18]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[16] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[19]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[17] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[18] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[20]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[19] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[21]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[20] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[22]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[21] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[23]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[22] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[24]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[23] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[25]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[24] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[26]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[25] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[27]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[26] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[28]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[27] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[29]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[28] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[29] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[30]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[30] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[31]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[31] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[32] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[33] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[34] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[35] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[36] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[8]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[37] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_READDATA[9]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[38] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITE" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[39] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[40] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[10]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[41] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[11]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[42] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[12]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[43] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[13]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[44] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[14]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[45] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[15]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[46] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[16]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[47] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[17]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[48] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[18]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[49] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[19]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[50] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[51] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[20]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[52] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[21]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[53] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[22]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[54] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[23]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[55] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[24]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[56] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[25]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[57] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[26]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[58] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[27]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[59] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[28]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[60] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[29]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[61] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[62] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[30]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[63] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[31]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[64] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[65] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[66] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[67] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[68] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[69] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[8]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[70] -to "otogame:main_soc|gl_avalon_intf:gl|AVL_GL_WRITEDATA[9]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[71] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|GL_CMD[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[72] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|GL_CMD[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[73] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|GL_CMD[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[74] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|GL_CMD[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[75] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|GL_DONE" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[76] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|GL_EXEC" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[77] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|GL_FRAME_FINISHED" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[78] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|GL_TIMEOUT" -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[3] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[19] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[24] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[26] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[7] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[10] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK=000000000000000000000000000" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK_LENGTH=27" -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[18] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[22] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[27] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ENABLE_ADVANCED_TRIGGER=1" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[3] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|GL_DONE" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[4] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|GL_EXEC" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[5] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|GL_FRAME_FINISHED" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[6] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|GL_TIMEOUT" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[7] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|EN" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[8] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_vga:vga|VGA_INTERFRAME" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[79] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|EN" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[80] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_RGB16[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[81] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_RGB16[10]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[82] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_RGB16[11]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[83] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_RGB16[12]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[84] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_RGB16[13]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[85] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_RGB16[14]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[86] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_RGB16[15]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[87] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_RGB16[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[88] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_RGB16[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[89] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_RGB16[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[90] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_RGB16[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[91] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_RGB16[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[92] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_RGB16[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[93] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_RGB16[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[94] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_RGB16[8]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[95] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_RGB16[9]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[96] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_X[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[97] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_X[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[98] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_X[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[99] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_X[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[100] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_X[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[101] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_X[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[102] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_X[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[103] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_X[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[104] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_X[8]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[105] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_X[9]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[106] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_Y[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[107] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_Y[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[108] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_Y[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[109] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_Y[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[110] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_Y[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[111] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_Y[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[112] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_Y[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[113] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_Y[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[114] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_Y[8]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[115] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_painter_rect:painter_rect|fb_PAINT_Y[9]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[116] -to "otogame:main_soc|gl_avalon_intf:gl|gl_mgr:gl_inst|gl_vga:vga|VGA_INTERFRAME" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_DATA_BITS=117" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_BITS=9" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STORAGE_QUALIFIER_BITS=117" -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[1] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
 set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[2] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[3] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
 set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[4] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[5] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[5] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
 set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[6] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[7] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[8] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[9] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[10] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[11] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[8] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[9] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
 set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[12] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
 set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[13] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
 set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[14] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[15] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[16] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[16] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
 set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[17] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[18] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[19] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[20] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[21] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[22] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[20] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[21] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
 set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[23] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[24] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
 set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[25] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[26] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[27] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[28] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[28] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
 set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[29] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[30] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[31] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL=1" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SAMPLE_DEPTH=8192" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_IN_ENABLED=0" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_PIPELINE=0" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_RAM_PIPELINE=0" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_COUNTER_PIPELINE=0" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ADVANCED_TRIGGER_ENTITY=basic,1," -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL_PIPELINE=1" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ENABLE_ADVANCED_TRIGGER=0" -section_id auto_signaltap_0
-set_global_assignment -name SLD_FILE db/stp1_auto_stripped.stp
-set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[30] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[31] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ADVANCED_TRIGGER_ENTITY=sld_reserved_osu_fpga_auto_signaltap_0_1_98ff," -section_id auto_signaltap_0
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
+set_global_assignment -name SLD_FILE db/stp1_auto_stripped.stp
\ No newline at end of file
diff --git a/osu_fpga_toplevel.sv b/osu_fpga_toplevel.sv
index fce8f17..f149a27 100644
--- a/osu_fpga_toplevel.sv
+++ b/osu_fpga_toplevel.sv
@@ -67,81 +67,7 @@ module osu_fpga_toplevel (
 		Reset_h <= ~(KEY[0]);        // The push buttons are active low
 	end
 
-	
-//	logic CLOCK_200 /*synthesis keep*/;
-//	pll oc(
-//		.clk_clk      (CLOCK_50),
-//		.clock_200_clk(CLOCK_200)
-//	);
-
-	logic[3:0] GL_CMD /*synthesis keep*/;
-	logic[31:0] GL_ARG1, GL_ARG2, GL_ARG3, GL_ARG4;
-	logic[31:0] GL_ARG5, GL_ARG6, GL_ARG7, GL_ARG8;
-	logic GL_EXEC, GL_FRAME_FINISHED, GL_DONE;
-	assign LEDG[0] = GL_FRAME_FINISHED;
-	gl_mgr test(
-		.CLOCK            (CLOCK_50),
-		.RESET            (Reset_h),
-		.GL_TIMEOUT       (LEDR[17]),
-		.GL_FRAME_FINISHED(GL_FRAME_FINISHED),
-		.GL_DONE          (GL_DONE),
-		.GL_DRAWTIME      (LEDR[9:0]),
-		.AVL_REQ          (1'b0),
-		.AVL_ADDR         (),
-		.AVL_DATA         (),
-		.AVL_READY        (),
-		.AVL_PLT_RD       (1'b0),
-		.AVL_PLT_WR       (1'b0),
-		.AVL_PLT_INDEX    (),
-		.AVL_PLT_RD_COLOR (),
-		.AVL_PLT_WR_COLOR (),
-//		.GPIO             (GPIO),
-	.*);
-
-	enum logic[3:0] {
-		s_idle, s_paint
-	} state, state_next /*synthesis keep*/;
-
-	always_ff @(posedge CLOCK_50) begin
-		if(Reset_h) begin
-			state <= s_idle;
-		end else begin
-			state <= state_next;
-		end
-	end
-
-	always_comb begin
-		state_next = state;
-		GL_ARG1 = 32'h0;
-		GL_ARG2 = 32'h0;
-		GL_ARG3 = 32'h0;
-		GL_ARG4 = 32'h0;
-		GL_ARG5 = 32'h0;
-		GL_ARG6 = 32'h0;
-		GL_ARG7 = 32'h0;
-		GL_ARG8 = 32'h0;
-		GL_EXEC = 1'b0;
-		case (state)
-			s_idle: begin
-				GL_CMD = `GL_CMD_FIN;
-				if(GL_FRAME_FINISHED) begin
-					state_next = s_paint;
-				end
-			end
-			s_paint: begin
-				GL_CMD = `GL_CMD_RECT;
-				GL_ARG1 = {12'h0, 10'd020, 10'd0};
-				GL_ARG2 = {12'h0, 10'd400, 10'd50};
-				GL_ARG3 = {5'b01100, 6'b110011, 5'b11111, 5'b01100, 6'b110011, 5'b11111};
-				GL_EXEC = 1'b1;
-				if (GL_DONE) begin
-					state_next = s_idle;
-				end
-			end
-		endcase
-	end
 
-    /*
 	// Additional wires for Flash
 	assign FL_WP_N = 1'b1;
 
@@ -182,41 +108,58 @@ module osu_fpga_toplevel (
 	// Main Program (SoC)
 	otogame main_soc (
 		// Clock
-		.clk_clk(CLOCK_50),
-		.reset_reset_n(~Reset_h),
+		.clk_clk               (CLOCK_50),
+		.reset_reset_n         (~Reset_h),
 		// DRAM
-		.sdram_wire_addr(DRAM_ADDR),
-		.sdram_wire_ba(DRAM_BA),
-		.sdram_wire_cas_n(DRAM_CAS_N),
-		.sdram_wire_cke(DRAM_CKE),
-		.sdram_wire_cs_n(DRAM_CS_N),
-		.sdram_wire_dq(DRAM_DQ),
-		.sdram_wire_dqm(DRAM_DQM),
-		.sdram_wire_ras_n(DRAM_RAS_N),
-		.sdram_wire_we_n(DRAM_WE_N),
-		.sdram_clk_clk(DRAM_CLK),
+		.sdram_wire_addr       (DRAM_ADDR),
+		.sdram_wire_ba         (DRAM_BA),
+		.sdram_wire_cas_n      (DRAM_CAS_N),
+		.sdram_wire_cke        (DRAM_CKE),
+		.sdram_wire_cs_n       (DRAM_CS_N),
+		.sdram_wire_dq         (DRAM_DQ),
+		.sdram_wire_dqm        (DRAM_DQM),
+		.sdram_wire_ras_n      (DRAM_RAS_N),
+		.sdram_wire_we_n       (DRAM_WE_N),
+		.sdram_clk_clk         (DRAM_CLK),
 		// Flash
-		.flash_conn_ADDR(FL_ADDR),
-		.flash_conn_DQ(FL_DQ),
-		.flash_conn_CE_N(FL_CE_N),
-		.flash_conn_OE_N(FL_OE_N),
-		.flash_conn_WE_N(FL_WE_N),
-		.flash_conn_RST_N(FL_RESET_N),
+		.flash_conn_ADDR       (FL_ADDR),
+		.flash_conn_DQ         (FL_DQ),
+		.flash_conn_CE_N       (FL_CE_N),
+		.flash_conn_OE_N       (FL_OE_N),
+		.flash_conn_WE_N       (FL_WE_N),
+		.flash_conn_RST_N      (FL_RESET_N),
 		// PS/2
-		.ps2_data_export(PS2_KBDAT),
-		.ps2_clk_export(PS2_KBCLK),
+		.ps2_data_export       (PS2_KBDAT),
+		.ps2_clk_export        (PS2_KBCLK),
 		// USB
 		.otg_hpi_address_export(hpi_addr),
-		.otg_hpi_data_in_port(hpi_data_in),
-		.otg_hpi_data_out_port(hpi_data_out),
-		.otg_hpi_cs_export(hpi_cs),
-		.otg_hpi_r_export(hpi_r),
-		.otg_hpi_w_export(hpi_w),
+		.otg_hpi_data_in_port  (hpi_data_in),
+		.otg_hpi_data_out_port (hpi_data_out),
+		.otg_hpi_cs_export     (hpi_cs),
+		.otg_hpi_r_export      (hpi_r),
+		.otg_hpi_w_export      (hpi_w),
 		// LEDs
-		.hex_export(hex_export),
-		.ledr_export(LEDR),
-		.ledg_export(LEDG)
+		.hex_export            (hex_export),
+		.ledr_export           (LEDR),
+		.ledg_export           (LEDG),
+		// SRAM
+		.sram_addr             (SRAM_ADDR),
+		.sram_data             (SRAM_DQ),
+		.sram_ce_n             (SRAM_CE_N),
+		.sram_oe_n             (SRAM_OE_N),
+		.sram_we_n             (SRAM_WE_N),
+		.sram_lb_n             (SRAM_LB_N),
+		.sram_ub_n             (SRAM_UB_N),
+		// VGA
+		.vga_clk               (VGA_CLK),
+		.vga_r                 (VGA_R),
+		.vga_g                 (VGA_G),
+		.vga_b                 (VGA_B),
+		.vga_hs                (VGA_HS),
+		.vga_vs                (VGA_VS),
+		.vga_blank_n           (VGA_BLANK_N),
+		.vga_sync_n            (VGA_SYNC_N)
 	);
-	*/
+
 
 endmodule
diff --git a/otogame.qsys b/otogame.qsys
index 683d49d..ebb0b2d 100644
--- a/otogame.qsys
+++ b/otogame.qsys
@@ -21,7 +21,7 @@
    {
       datum _sortIndex
       {
-         value = "10";
+         value = "11";
          type = "int";
       }
       datum sopceditor_expanded
@@ -55,7 +55,7 @@
    {
       datum _sortIndex
       {
-         value = "29";
+         value = "30";
          type = "int";
       }
    }
@@ -111,7 +111,7 @@
    {
       datum _sortIndex
       {
-         value = "11";
+         value = "12";
          type = "int";
       }
       datum sopceditor_expanded
@@ -136,11 +136,27 @@
          type = "String";
       }
    }
+   element main_stack
+   {
+      datum _sortIndex
+      {
+         value = "4";
+         type = "int";
+      }
+   }
+   element main_stack.s1
+   {
+      datum baseAddress
+      {
+         value = "1073741824";
+         type = "String";
+      }
+   }
    element mouse_btn_in
    {
       datum _sortIndex
       {
-         value = "19";
+         value = "20";
          type = "int";
       }
       datum sopceditor_expanded
@@ -161,7 +177,7 @@
    {
       datum _sortIndex
       {
-         value = "18";
+         value = "19";
          type = "int";
       }
       datum sopceditor_expanded
@@ -182,7 +198,7 @@
    {
       datum _sortIndex
       {
-         value = "17";
+         value = "18";
          type = "int";
       }
       datum sopceditor_expanded
@@ -203,7 +219,7 @@
    {
       datum _sortIndex
       {
-         value = "16";
+         value = "17";
          type = "int";
       }
       datum sopceditor_expanded
@@ -224,7 +240,7 @@
    {
       datum _sortIndex
       {
-         value = "13";
+         value = "14";
          type = "int";
       }
       datum sopceditor_expanded
@@ -245,7 +261,7 @@
    {
       datum _sortIndex
       {
-         value = "12";
+         value = "13";
          type = "int";
       }
       datum sopceditor_expanded
@@ -266,7 +282,7 @@
    {
       datum _sortIndex
       {
-         value = "15";
+         value = "16";
          type = "int";
       }
       datum sopceditor_expanded
@@ -287,7 +303,7 @@
    {
       datum _sortIndex
       {
-         value = "14";
+         value = "15";
          type = "int";
       }
       datum sopceditor_expanded
@@ -308,7 +324,7 @@
    {
       datum _sortIndex
       {
-         value = "8";
+         value = "9";
          type = "int";
       }
       datum sopceditor_expanded
@@ -321,7 +337,7 @@
    {
       datum _sortIndex
       {
-         value = "25";
+         value = "26";
          type = "int";
       }
       datum sopceditor_expanded
@@ -342,7 +358,7 @@
    {
       datum _sortIndex
       {
-         value = "21";
+         value = "22";
          type = "int";
       }
       datum sopceditor_expanded
@@ -363,7 +379,7 @@
    {
       datum _sortIndex
       {
-         value = "20";
+         value = "21";
          type = "int";
       }
       datum sopceditor_expanded
@@ -384,7 +400,7 @@
    {
       datum _sortIndex
       {
-         value = "22";
+         value = "23";
          type = "int";
       }
       datum sopceditor_expanded
@@ -405,7 +421,7 @@
    {
       datum _sortIndex
       {
-         value = "23";
+         value = "24";
          type = "int";
       }
       datum sopceditor_expanded
@@ -426,7 +442,7 @@
    {
       datum _sortIndex
       {
-         value = "24";
+         value = "25";
          type = "int";
       }
       datum sopceditor_expanded
@@ -471,7 +487,7 @@
    {
       datum _sortIndex
       {
-         value = "26";
+         value = "27";
          type = "int";
       }
       datum sopceditor_expanded
@@ -492,7 +508,7 @@
    {
       datum _sortIndex
       {
-         value = "28";
+         value = "29";
          type = "int";
       }
       datum sopceditor_expanded
@@ -513,7 +529,7 @@
    {
       datum _sortIndex
       {
-         value = "27";
+         value = "28";
          type = "int";
       }
       datum sopceditor_expanded
@@ -534,7 +550,7 @@
    {
       datum _sortIndex
       {
-         value = "7";
+         value = "8";
          type = "int";
       }
       datum sopceditor_expanded
@@ -576,7 +592,7 @@
    {
       datum _sortIndex
       {
-         value = "5";
+         value = "6";
          type = "int";
       }
    }
@@ -584,7 +600,7 @@
    {
       datum _sortIndex
       {
-         value = "9";
+         value = "10";
          type = "int";
       }
       datum sopceditor_expanded
@@ -605,7 +621,7 @@
    {
       datum _sortIndex
       {
-         value = "4";
+         value = "5";
          type = "int";
       }
       datum sopceditor_expanded
@@ -626,7 +642,7 @@
    {
       datum _sortIndex
       {
-         value = "6";
+         value = "7";
          type = "int";
       }
    }
@@ -788,6 +804,38 @@
   <parameter name="writeIRQThreshold" value="8" />
  </module>
  <module name="keyboard" kind="ps2kb" version="1.0" enabled="1" />
+ <module
+   name="main_stack"
+   kind="altera_avalon_onchip_memory2"
+   version="17.1"
+   enabled="1">
+  <parameter name="allowInSystemMemoryContentEditor" value="false" />
+  <parameter name="autoInitializationFileName">$${FILENAME}_main_stack</parameter>
+  <parameter name="blockType" value="AUTO" />
+  <parameter name="copyInitFile" value="false" />
+  <parameter name="dataWidth" value="8" />
+  <parameter name="dataWidth2" value="32" />
+  <parameter name="deviceFamily" value="Cyclone IV E" />
+  <parameter name="deviceFeatures">ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter>
+  <parameter name="dualPort" value="false" />
+  <parameter name="ecc_enabled" value="false" />
+  <parameter name="enPRInitMode" value="false" />
+  <parameter name="enableDiffWidth" value="false" />
+  <parameter name="initMemContent" value="false" />
+  <parameter name="initializationFileName" value="onchip_mem.hex" />
+  <parameter name="instanceID" value="NONE" />
+  <parameter name="memorySize" value="65536" />
+  <parameter name="readDuringWriteMode" value="DONT_CARE" />
+  <parameter name="resetrequest_enabled" value="true" />
+  <parameter name="simAllowMRAMContentsFile" value="false" />
+  <parameter name="simMemInitOnlyFilename" value="0" />
+  <parameter name="singleClockOperation" value="false" />
+  <parameter name="slave1Latency" value="1" />
+  <parameter name="slave2Latency" value="1" />
+  <parameter name="useNonDefaultInitFile" value="false" />
+  <parameter name="useShallowMemBlocks" value="false" />
+  <parameter name="writable" value="true" />
+ </module>
  <module
    name="mouse_btn_in"
    kind="altera_avalon_pio"
@@ -1277,15 +1325,15 @@
   <parameter name="customInstSlavesSystemInfo_nios_a" value="&lt;info/&gt;" />
   <parameter name="customInstSlavesSystemInfo_nios_b" value="&lt;info/&gt;" />
   <parameter name="customInstSlavesSystemInfo_nios_c" value="&lt;info/&gt;" />
-  <parameter name="dataAddrWidth" value="30" />
+  <parameter name="dataAddrWidth" value="31" />
   <parameter name="dataMasterHighPerformanceAddrWidth" value="1" />
   <parameter name="dataMasterHighPerformanceMapParam" value="" />
-  <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='ocm_null.s1' start='0x0' end='0x10' type='altera_avalon_onchip_memory2.s1' /><slave name='pll.pll_slave' start='0x30' end='0x40' type='altpll.pll_slave' /><slave name='timer.s1' start='0x40' end='0x60' type='altera_avalon_timer.s1' /><slave name='proc_main.debug_mem_slave' start='0x1000' end='0x1800' type='altera_nios2_gen2.debug_mem_slave' /><slave name='sysid_main.control_slave' start='0x2080' end='0x2088' type='altera_avalon_sysid_qsys.control_slave' /><slave name='jtag_uart.avalon_jtag_slave' start='0x2090' end='0x2098' type='altera_avalon_jtag_uart.avalon_jtag_slave' /><slave name='pio_hex.s1' start='0x2100' end='0x2110' type='altera_avalon_pio.s1' /><slave name='pio_ledr.s1' start='0x2110' end='0x2120' type='altera_avalon_pio.s1' /><slave name='pio_ledg.s1' start='0x2120' end='0x2130' type='altera_avalon_pio.s1' /><slave name='keyboard.key_events' start='0x5000' end='0x5010' type='ps2kb.key_events' /><slave name='mouse_x_in.s1' start='0x5110' end='0x5120' type='altera_avalon_pio.s1' /><slave name='mouse_y_in.s1' start='0x5120' end='0x5130' type='altera_avalon_pio.s1' /><slave name='mouse_scroll_in.s1' start='0x5130' end='0x5140' type='altera_avalon_pio.s1' /><slave name='mouse_btn_in.s1' start='0x5140' end='0x5150' type='altera_avalon_pio.s1' /><slave name='gl.slave_gl' start='0x5200' end='0x5210' type='oto_gl.slave_gl' /><slave name='sdram.s1' start='0x10000000' end='0x18000000' type='altera_avalon_new_sdram_controller.s1' /><slave name='flash.flash_data' start='0x20000000' end='0x20800000' type='Altera_UP_Flash_Memory_IP_Core_Avalon_Interface.flash_data' /><slave name='flash.flash_erase_control' start='0x20F00000' end='0x20F00004' type='Altera_UP_Flash_Memory_IP_Core_Avalon_Interface.flash_erase_control' /><slave name='gl.slave_sram' start='0x21000000' end='0x21400000' type='oto_gl.slave_sram' /><slave name='gl.slave_palette' start='0x21F00000' end='0x21F00400' type='oto_gl.slave_palette' /></address-map>]]></parameter>
+  <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='ocm_null.s1' start='0x0' end='0x10' type='altera_avalon_onchip_memory2.s1' /><slave name='pll.pll_slave' start='0x30' end='0x40' type='altpll.pll_slave' /><slave name='timer.s1' start='0x40' end='0x60' type='altera_avalon_timer.s1' /><slave name='proc_main.debug_mem_slave' start='0x1000' end='0x1800' type='altera_nios2_gen2.debug_mem_slave' /><slave name='sysid_main.control_slave' start='0x2080' end='0x2088' type='altera_avalon_sysid_qsys.control_slave' /><slave name='jtag_uart.avalon_jtag_slave' start='0x2090' end='0x2098' type='altera_avalon_jtag_uart.avalon_jtag_slave' /><slave name='pio_hex.s1' start='0x2100' end='0x2110' type='altera_avalon_pio.s1' /><slave name='pio_ledr.s1' start='0x2110' end='0x2120' type='altera_avalon_pio.s1' /><slave name='pio_ledg.s1' start='0x2120' end='0x2130' type='altera_avalon_pio.s1' /><slave name='keyboard.key_events' start='0x5000' end='0x5010' type='ps2kb.key_events' /><slave name='mouse_x_in.s1' start='0x5110' end='0x5120' type='altera_avalon_pio.s1' /><slave name='mouse_y_in.s1' start='0x5120' end='0x5130' type='altera_avalon_pio.s1' /><slave name='mouse_scroll_in.s1' start='0x5130' end='0x5140' type='altera_avalon_pio.s1' /><slave name='mouse_btn_in.s1' start='0x5140' end='0x5150' type='altera_avalon_pio.s1' /><slave name='gl.slave_gl' start='0x5200' end='0x5240' type='oto_gl.slave_gl' /><slave name='sdram.s1' start='0x10000000' end='0x18000000' type='altera_avalon_new_sdram_controller.s1' /><slave name='flash.flash_data' start='0x20000000' end='0x20800000' type='Altera_UP_Flash_Memory_IP_Core_Avalon_Interface.flash_data' /><slave name='flash.flash_erase_control' start='0x20F00000' end='0x20F00004' type='Altera_UP_Flash_Memory_IP_Core_Avalon_Interface.flash_erase_control' /><slave name='gl.slave_sram' start='0x21000000' end='0x21400000' type='oto_gl.slave_sram' /><slave name='gl.slave_palette' start='0x21F00000' end='0x21F00400' type='oto_gl.slave_palette' /><slave name='main_stack.s1' start='0x40000000' end='0x40010000' type='altera_avalon_onchip_memory2.s1' /></address-map>]]></parameter>
   <parameter name="data_master_high_performance_paddr_base" value="0" />
   <parameter name="data_master_high_performance_paddr_size" value="0" />
   <parameter name="data_master_paddr_base" value="0" />
   <parameter name="data_master_paddr_size" value="0" />
-  <parameter name="dcache_bursts" value="false" />
+  <parameter name="dcache_bursts" value="true" />
   <parameter name="dcache_numTCDM" value="0" />
   <parameter name="dcache_ramBlockType" value="Automatic" />
   <parameter name="dcache_size" value="2048" />
@@ -1296,14 +1344,14 @@
   <parameter name="debug_datatrigger" value="0" />
   <parameter name="debug_debugReqSignals" value="false" />
   <parameter name="debug_enabled" value="true" />
-  <parameter name="debug_hwbreakpoint" value="0" />
+  <parameter name="debug_hwbreakpoint" value="2" />
   <parameter name="debug_jtagInstanceID" value="0" />
   <parameter name="debug_traceStorage" value="onchip_trace" />
   <parameter name="debug_traceType" value="none" />
   <parameter name="debug_triggerArming" value="true" />
   <parameter name="deviceFamilyName" value="Cyclone IV E" />
   <parameter name="deviceFeaturesSystemInfo">ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter>
-  <parameter name="dividerType" value="no_div" />
+  <parameter name="dividerType" value="srt2" />
   <parameter name="exceptionOffset" value="32" />
   <parameter name="exceptionSlave" value="sdram.s1" />
   <parameter name="faAddrWidth" value="1" />
@@ -1312,14 +1360,14 @@
   <parameter name="fa_cache_linesize" value="0" />
   <parameter name="flash_instruction_master_paddr_base" value="0" />
   <parameter name="flash_instruction_master_paddr_size" value="0" />
-  <parameter name="icache_burstType" value="None" />
+  <parameter name="icache_burstType" value="Sequential" />
   <parameter name="icache_numTCIM" value="0" />
   <parameter name="icache_ramBlockType" value="Automatic" />
   <parameter name="icache_size" value="4096" />
   <parameter name="icache_tagramBlockType" value="Automatic" />
-  <parameter name="impl" value="Tiny" />
-  <parameter name="instAddrWidth" value="29" />
-  <parameter name="instSlaveMapParam"><![CDATA[<address-map><slave name='ocm_null.s1' start='0x0' end='0x10' type='altera_avalon_onchip_memory2.s1' /><slave name='proc_main.debug_mem_slave' start='0x1000' end='0x1800' type='altera_nios2_gen2.debug_mem_slave' /><slave name='sysid_main.control_slave' start='0x2080' end='0x2088' type='altera_avalon_sysid_qsys.control_slave' /><slave name='jtag_uart.avalon_jtag_slave' start='0x2090' end='0x2098' type='altera_avalon_jtag_uart.avalon_jtag_slave' /><slave name='sdram.s1' start='0x10000000' end='0x18000000' type='altera_avalon_new_sdram_controller.s1' /></address-map>]]></parameter>
+  <parameter name="impl" value="Fast" />
+  <parameter name="instAddrWidth" value="30" />
+  <parameter name="instSlaveMapParam"><![CDATA[<address-map><slave name='ocm_null.s1' start='0x0' end='0x10' type='altera_avalon_onchip_memory2.s1' /><slave name='proc_main.debug_mem_slave' start='0x1000' end='0x1800' type='altera_nios2_gen2.debug_mem_slave' /><slave name='sysid_main.control_slave' start='0x2080' end='0x2088' type='altera_avalon_sysid_qsys.control_slave' /><slave name='jtag_uart.avalon_jtag_slave' start='0x2090' end='0x2098' type='altera_avalon_jtag_uart.avalon_jtag_slave' /><slave name='sdram.s1' start='0x10000000' end='0x18000000' type='altera_avalon_new_sdram_controller.s1' /><slave name='flash.flash_data' start='0x20000000' end='0x20800000' type='Altera_UP_Flash_Memory_IP_Core_Avalon_Interface.flash_data' /></address-map>]]></parameter>
   <parameter name="instructionMasterHighPerformanceAddrWidth" value="1" />
   <parameter name="instructionMasterHighPerformanceMapParam" value="" />
   <parameter name="instruction_master_high_performance_paddr_base" value="0" />
@@ -1348,8 +1396,8 @@
   <parameter name="mpu_useLimit" value="false" />
   <parameter name="mpx_enabled" value="false" />
   <parameter name="mul_32_impl" value="2" />
-  <parameter name="mul_64_impl" value="0" />
-  <parameter name="mul_shift_choice" value="0" />
+  <parameter name="mul_64_impl" value="1" />
+  <parameter name="mul_shift_choice" value="1" />
   <parameter name="ocimem_ramBlockType" value="Automatic" />
   <parameter name="ocimem_ramInit" value="false" />
   <parameter name="regfile_ramBlockType" value="Automatic" />
@@ -1968,6 +2016,15 @@
   <parameter name="baseAddress" value="0x0000" />
   <parameter name="defaultConnection" value="false" />
  </connection>
+ <connection
+   kind="avalon"
+   version="17.1"
+   start="proc_main.data_master"
+   end="main_stack.s1">
+  <parameter name="arbitrationPriority" value="1" />
+  <parameter name="baseAddress" value="0x40000000" />
+  <parameter name="defaultConnection" value="false" />
+ </connection>
  <connection
    kind="avalon"
    version="17.1"
@@ -2049,6 +2106,15 @@
   <parameter name="baseAddress" value="0x1800" />
   <parameter name="defaultConnection" value="false" />
  </connection>
+ <connection
+   kind="avalon"
+   version="17.1"
+   start="proc_main.instruction_master"
+   end="flash.flash_data">
+  <parameter name="arbitrationPriority" value="1" />
+  <parameter name="baseAddress" value="0x20000000" />
+  <parameter name="defaultConnection" value="false" />
+ </connection>
  <connection
    kind="avalon"
    version="17.1"
@@ -2172,6 +2238,7 @@
  <connection kind="clock" version="17.1" start="clk_50.clk" end="proc_main.clk" />
  <connection kind="clock" version="17.1" start="clk_50.clk" end="sysid_main.clk" />
  <connection kind="clock" version="17.1" start="clk_50.clk" end="ocm_null.clk1" />
+ <connection kind="clock" version="17.1" start="clk_50.clk" end="main_stack.clk1" />
  <connection kind="clock" version="17.1" start="clk_50.clk" end="keyboard.clock" />
  <connection kind="clock" version="17.1" start="clk_50.clk" end="gl.clock" />
  <connection
@@ -2393,6 +2460,11 @@
    version="17.1"
    start="clk_50.clk_reset"
    end="ocm_null.reset1" />
+ <connection
+   kind="reset"
+   version="17.1"
+   start="clk_50.clk_reset"
+   end="main_stack.reset1" />
  <connection
    kind="reset"
    version="17.1"
@@ -2433,6 +2505,11 @@
    version="17.1"
    start="proc_usb.debug_reset_request"
    end="otg_hpi_cs.reset" />
+ <connection
+   kind="reset"
+   version="17.1"
+   start="proc_main.debug_reset_request"
+   end="main_stack.reset1" />
  <connection
    kind="reset"
    version="17.1"
diff --git a/software/.gitignore b/software/.gitignore
index a450043..9606f47 100644
--- a/software/.gitignore
+++ b/software/.gitignore
@@ -5,3 +5,6 @@
 *.objdump
 *.elf
 *.map
+obj/
+.force_rebuild
+.force_relink
diff --git a/software/osu_main/Makefile b/software/osu_main/Makefile
index 24d9434..f9e547f 100644
--- a/software/osu_main/Makefile
+++ b/software/osu_main/Makefile
@@ -142,7 +142,11 @@ ACDS_VERSION := 17.1
 ELF := osu_main.elf
 
 # Paths to C, C++, and assembly source files.
-C_SRCS := src/main.c
+C_SRCS += src/main.c
+C_SRCS += src/gl/regs.c
+C_SRCS += src/gl/gl.c
+C_SRCS += src/gl/painters.c
+C_SRCS += src/gl/util.c
 CXX_SRCS :=
 ASM_SRCS :=
 
diff --git a/software/osu_main/src/gl/gl.c b/software/osu_main/src/gl/gl.c
new file mode 100644
index 0000000..c378ef2
--- /dev/null
+++ b/software/osu_main/src/gl/gl.c
@@ -0,0 +1,31 @@
+#include "gl.h"
+
+#include "io.h"
+#include "regs.h"
+
+inline void gl_wait() {
+	while (!(GL_IORD(GL_STATUS, 0)&GL_STATUS_DONE)) {
+		/*
+		if (gl_status_frame_timeout) {
+			printf("Warning: timeout during wait\n");
+			return;
+		}
+		*/
+	}
+	// *gl_command = GL_CMD_NOOP;
+	GL_IOWR(GL_COMMAND, 0, GL_CMD_NOOP);
+}
+
+inline void gl_finalize_frame() {
+	// *gl_command = GL_CMD_FIN;
+	gl_wait();
+	GL_IOWR(GL_COMMAND, 0, GL_CMD_FIN);
+	while (!(GL_IORD(GL_STATUS, 0)|(GL_STATUS_DONE|GL_STATUS_FRAME_TIMEOUT))) {
+		/*
+		if (gl_status_frame_timeout) {
+			printf("Warning: timeout during finalize\n");
+			return;
+		}
+		*/
+	}
+}
diff --git a/software/osu_main/src/gl/gl.h b/software/osu_main/src/gl/gl.h
new file mode 100644
index 0000000..b0168dc
--- /dev/null
+++ b/software/osu_main/src/gl/gl.h
@@ -0,0 +1,14 @@
+#ifndef GL_H_
+#define GL_H_
+
+#include "painters.h"
+#include "util.h"
+
+#define GL_CMD_NOOP			0x0
+#define GL_CMD_RECT			0x1
+#define GL_CMD_FIN			0xf
+
+void gl_wait();
+void gl_finalize_frame();
+
+#endif
diff --git a/software/osu_main/src/gl/painters.c b/software/osu_main/src/gl/painters.c
new file mode 100644
index 0000000..d6cd9da
--- /dev/null
+++ b/software/osu_main/src/gl/painters.c
@@ -0,0 +1,20 @@
+#include "painters.h"
+
+#include "io.h"
+#include "gl.h"
+#include "regs.h"
+
+void gl_rect(uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1,
+			 uint16_t color0, uint16_t color1, uint16_t stroke,
+			 uint8_t gradient_direction) {
+	gl_wait();
+
+	GL_IOWR(GL_ARGS, 0, gl_make_point(x0, y0));
+	GL_IOWR(GL_ARGS, 1, gl_make_point(x1, y1));
+	GL_IOWR(GL_ARGS, 2, (color1<<16) | color0);
+	GL_IOWR(GL_ARGS, 3, gradient_direction);
+	GL_IOWR(GL_ARGS, 4, stroke);
+
+	GL_IOWR(GL_COMMAND, 0, GL_CMD_RECT);
+}
+
diff --git a/software/osu_main/src/gl/painters.h b/software/osu_main/src/gl/painters.h
new file mode 100644
index 0000000..85a481d
--- /dev/null
+++ b/software/osu_main/src/gl/painters.h
@@ -0,0 +1,10 @@
+#ifndef GL_PAINTERS_H_
+#define GL_PAINTERS_H_
+
+#include "inttypes.h"
+
+void gl_rect(uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1,
+			 uint16_t color0, uint16_t color1, uint16_t stroke,
+			 uint8_t gradient_direction);
+
+#endif
diff --git a/software/osu_main/src/gl/regs.c b/software/osu_main/src/gl/regs.c
new file mode 100644
index 0000000..68d0a82
--- /dev/null
+++ b/software/osu_main/src/gl/regs.c
@@ -0,0 +1,4 @@
+#include "regs.h"
+
+#include "system.h"
+
diff --git a/software/osu_main/src/gl/regs.h b/software/osu_main/src/gl/regs.h
new file mode 100644
index 0000000..c7bedb3
--- /dev/null
+++ b/software/osu_main/src/gl/regs.h
@@ -0,0 +1,27 @@
+#ifndef GL_REGS_H_
+#define GL_REGS_H_
+
+#include "system.h"
+#include "io.h"
+
+#define GL_BASE			GL_SLAVE_GL_BASE
+#define GL_IOWR(base, offset, data) IOWR_32DIRECT(GL_BASE+(((base)+(offset))<<2), 0, data)
+#define GL_IORD(base, offset) IORD_32DIRECT(GL_BASE+(((base)+(offset))<<2), 0)
+
+#define GL_STATUS		0x0
+#define GL_DRAWTIME		0x1
+#define GL_COMMAND		0x2
+#define GL_ARGS			0x8
+
+#define GL_STATUS_DONE			0x1
+#define GL_STATUS_FRAME_DONE	0x2
+#define GL_STATUS_FRAME_TIMEOUT	0x4
+
+#define GL_PALETTE		GL_SLAVE_PALETTE_BASE
+#define GL_PLWR(index, data) IOWR_32DIRECT(GL_PALETTE+((index)<<2), 0, data)
+#define GL_PLRD(index) IORD_32DIRECT(GL_PALETTE+((index)<<2), 0)
+
+#define GL_SRAM			GL_SLAVE_SRAM_BASE
+#define GL_SRAMWR(addr, data) IOWR_32DIRECT(GL_SRAM+((addr)<<2), 0, data)
+
+#endif /* SRC_GL_REGS_H_ */
diff --git a/software/osu_main/src/gl/util.c b/software/osu_main/src/gl/util.c
new file mode 100644
index 0000000..26f4a47
--- /dev/null
+++ b/software/osu_main/src/gl/util.c
@@ -0,0 +1,16 @@
+#include "util.h"
+
+inline uint32_t gl_make_point(uint16_t x, uint16_t y) {
+	return ((x << 10) | y);
+}
+
+inline uint32_t gl_make_rgb(uint8_t r, uint8_t g, uint8_t b) {
+	r >>= 3;
+	g >>= 2;
+	b >>= 3;
+	return (r << 11) | (g << 5) | b;
+}
+
+inline uint32_t gl_make_color(uint32_t c) {
+	return ((c>>19)<<11) | (((c&0x00ff00)>>10)<<5) | ((c&0x0000ff)>>3);
+}
diff --git a/software/osu_main/src/gl/util.h b/software/osu_main/src/gl/util.h
new file mode 100644
index 0000000..afe975c
--- /dev/null
+++ b/software/osu_main/src/gl/util.h
@@ -0,0 +1,10 @@
+#ifndef GL_UTIL_H_
+#define GL_UTIL_H_
+
+#include <inttypes.h>
+
+uint32_t gl_make_point(uint16_t x, uint16_t y);
+uint32_t gl_make_rgb(uint8_t r, uint8_t g, uint8_t b);
+uint32_t gl_make_color(uint32_t c);
+
+#endif
diff --git a/software/osu_main/src/main.c b/software/osu_main/src/main.c
index 36ebd74..2ac51e3 100644
--- a/software/osu_main/src/main.c
+++ b/software/osu_main/src/main.c
@@ -6,11 +6,14 @@
  */
 
 #include <stdio.h>
+#include <time.h>
 #include <inttypes.h>
 
 #include "system.h"
 
 #include "input/hid.h"
+#include "gl/gl.h"
+#include "gl/regs.h"
 
 int main() {
 	printf("Hello world\n");
@@ -18,7 +21,15 @@ int main() {
 	int x, y, sch, btn;
 	int m_mod = 0;
 
+	size_t t_start=clock();
+	for (size_t i=0; i<0xffff; i++);
+	size_t t_end = clock();
+	printf("Bench: 65536 loops took %d ms\n", (t_end-t_start));
+
+
+
 	while (1) {
+		/*
 		for (int i=0; i<2; i++) {
 			if (kbdr[i]) {
 				printf("Key pressed (%d): %02x\n", i, (int)kbdr[i]);
@@ -52,6 +63,10 @@ int main() {
 		if (m_mod) {
 			printf("(%d, %d) wheel=%d btn=%x\n", x, y, sch, btn);
 		}
+		*/
+		gl_rect(25, 25, 200, 300, gl_make_color(0x66ccff), gl_make_color(0x66ccff), gl_make_color(0xffffff), 1);
+		gl_finalize_frame();
+
 	}
 
 	return 0;
diff --git a/software/usb/Makefile b/software/usb/Makefile
index fcf5ba3..05546a0 100644
--- a/software/usb/Makefile
+++ b/software/usb/Makefile
@@ -164,7 +164,7 @@ CREATE_LINKER_MAP := 1
 # Common arguments for ALT_CFLAGSs
 APP_CFLAGS_DEFINED_SYMBOLS :=
 APP_CFLAGS_UNDEFINED_SYMBOLS :=
-APP_CFLAGS_OPTIMIZATION := -O0
+APP_CFLAGS_OPTIMIZATION := -O3
 APP_CFLAGS_DEBUG_LEVEL := -g
 APP_CFLAGS_WARNINGS := -Wall
 APP_CFLAGS_USER_FLAGS :=
-- 
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